Hi Sudeep,
On 4 January 2018 at 13:31, Sudeep Holla wrote:
> Hi Ulf,
>
> I will suggest some wording changes not of which are not compulsory and
> left to you to pick up or drop.
Thanks for reviewing!
>
> On 28/12/17 14:40, Ulf Hansson wrote:
>> From: Lina Iyer
Hi Sudeep,
On 4 January 2018 at 13:31, Sudeep Holla wrote:
> Hi Ulf,
>
> I will suggest some wording changes not of which are not compulsory and
> left to you to pick up or drop.
Thanks for reviewing!
>
> On 28/12/17 14:40, Ulf Hansson wrote:
>> From: Lina Iyer
>>
>> Update DT bindings to
Hi Ulf,
I will suggest some wording changes not of which are not compulsory and
left to you to pick up or drop.
On 28/12/17 14:40, Ulf Hansson wrote:
> From: Lina Iyer
>
> Update DT bindings to represent hierarchical CPU and CPU domain idle states
> for PSCI. Also update
Hi Ulf,
I will suggest some wording changes not of which are not compulsory and
left to you to pick up or drop.
On 28/12/17 14:40, Ulf Hansson wrote:
> From: Lina Iyer
>
> Update DT bindings to represent hierarchical CPU and CPU domain idle states
> for PSCI. Also update the PSCI examples to
On Thu, Dec 28, 2017 at 03:40:37PM +0100, Ulf Hansson wrote:
> From: Lina Iyer
>
> Update DT bindings to represent hierarchical CPU and CPU domain idle states
> for PSCI. Also update the PSCI examples to clearly show how flattened and
> hierarchical idle states can be
On Thu, Dec 28, 2017 at 03:40:37PM +0100, Ulf Hansson wrote:
> From: Lina Iyer
>
> Update DT bindings to represent hierarchical CPU and CPU domain idle states
> for PSCI. Also update the PSCI examples to clearly show how flattened and
> hierarchical idle states can be represented in DT.
>
>
From: Lina Iyer
Update DT bindings to represent hierarchical CPU and CPU domain idle states
for PSCI. Also update the PSCI examples to clearly show how flattened and
hierarchical idle states can be represented in DT.
Signed-off-by: Lina Iyer
From: Lina Iyer
Update DT bindings to represent hierarchical CPU and CPU domain idle states
for PSCI. Also update the PSCI examples to clearly show how flattened and
hierarchical idle states can be represented in DT.
Signed-off-by: Lina Iyer
Signed-off-by: Ulf Hansson
---
Changes in v2:
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