On 2015-12-09 21:55, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
> implementation CTAR offset is derived from CS
On 2015-12-10 01:06, Alexander Stein wrote:
> On Thursday 10 December 2015 14:14:11, Bhuvanchandra DV wrote:
>> On 12/10/2015 12:45 PM, Alexander Stein wrote:
>> > On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
>> >> DSPI instances in Vybrid have a different amount of chip selects
On Thursday 10 December 2015 14:14:11, Bhuvanchandra DV wrote:
> On 12/10/2015 12:45 PM, Alexander Stein wrote:
> > On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
> >> DSPI instances in Vybrid have a different amount of chip selects
> >> and CTARs (Clock and transfer Attributes
On 12/10/2015 12:45 PM, Alexander Stein wrote:
On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present
On 12/10/2015 12:45 PM, Alexander Stein wrote:
On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present
On Thursday 10 December 2015 14:14:11, Bhuvanchandra DV wrote:
> On 12/10/2015 12:45 PM, Alexander Stein wrote:
> > On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
> >> DSPI instances in Vybrid have a different amount of chip selects
> >> and CTARs (Clock and transfer Attributes
On 2015-12-09 21:55, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
> implementation CTAR offset is derived from CS
On 2015-12-10 01:06, Alexander Stein wrote:
> On Thursday 10 December 2015 14:14:11, Bhuvanchandra DV wrote:
>> On 12/10/2015 12:45 PM, Alexander Stein wrote:
>> > On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
>> >> DSPI instances in Vybrid have a different amount of chip selects
On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
> implementation CTAR offset is
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
implementation CTAR offset is derived from CS instance which will
lead to out of bound access if chip
DSPI instances in Vybrid have a different amount of chip selects
and CTARs (Clock and transfer Attributes Register). In case of
DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
implementation CTAR offset is derived from CS instance which will
lead to out of bound access if chip
On Thursday 10 December 2015 11:25:30, Bhuvanchandra DV wrote:
> DSPI instances in Vybrid have a different amount of chip selects
> and CTARs (Clock and transfer Attributes Register). In case of
> DSPI1 we only have 2 CTAR registers and 4 CS. In present driver
> implementation CTAR offset is
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