On Fri, Mar 02, 2018 at 11:39:16AM +0100, Rafael J. Wysocki wrote:
> On 3/2/2018 11:15 AM, Du, Changbin wrote:
> > On Fri, Mar 02, 2018 at 11:18:10AM +0100, Rafael J. Wysocki wrote:
> > > On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin
> > > wrote:
> > > > > > > That rather
On Fri, Mar 02, 2018 at 11:39:16AM +0100, Rafael J. Wysocki wrote:
> On 3/2/2018 11:15 AM, Du, Changbin wrote:
> > On Fri, Mar 02, 2018 at 11:18:10AM +0100, Rafael J. Wysocki wrote:
> > > On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin
> > > wrote:
> > > > > > > That rather isn't the case if
On 3/2/2018 11:15 AM, Du, Changbin wrote:
On Fri, Mar 02, 2018 at 11:18:10AM +0100, Rafael J. Wysocki wrote:
On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin wrote:
That rather isn't the case if negative values are ever passed to the
tracepoint, right?
yes.
Which seems
On 3/2/2018 11:15 AM, Du, Changbin wrote:
On Fri, Mar 02, 2018 at 11:18:10AM +0100, Rafael J. Wysocki wrote:
On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin wrote:
That rather isn't the case if negative values are ever passed to the
tracepoint, right?
yes.
Which seems to be the reason why
On Fri, Mar 02, 2018 at 11:18:10AM +0100, Rafael J. Wysocki wrote:
> On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin wrote:
> >> >> That rather isn't the case if negative values are ever passed to the
> >> >> tracepoint, right?
> >> >>
> >> > yes.
> >> >> Which seems to be
On Fri, Mar 02, 2018 at 11:18:10AM +0100, Rafael J. Wysocki wrote:
> On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin wrote:
> >> >> That rather isn't the case if negative values are ever passed to the
> >> >> tracepoint, right?
> >> >>
> >> > yes.
> >> >> Which seems to be the reason why you want
On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin wrote:
>> >> That rather isn't the case if negative values are ever passed to the
>> >> tracepoint, right?
>> >>
>> > yes.
>> >> Which seems to be the reason why you want to make this change, isn't it?
>> >>
>> > yes, to improve
On Fri, Mar 2, 2018 at 10:41 AM, Du, Changbin wrote:
>> >> That rather isn't the case if negative values are ever passed to the
>> >> tracepoint, right?
>> >>
>> > yes.
>> >> Which seems to be the reason why you want to make this change, isn't it?
>> >>
>> > yes, to improve readability.
>> >
>>
> >> That rather isn't the case if negative values are ever passed to the
> >> tracepoint, right?
> >>
> > yes.
> >> Which seems to be the reason why you want to make this change, isn't it?
> >>
> > yes, to improve readability.
> >
> >> So maybe fix the code using the tracepoint(s) to avoid
> >> That rather isn't the case if negative values are ever passed to the
> >> tracepoint, right?
> >>
> > yes.
> >> Which seems to be the reason why you want to make this change, isn't it?
> >>
> > yes, to improve readability.
> >
> >> So maybe fix the code using the tracepoint(s) to avoid
[Fix up LKML address.]
On Thu, Mar 1, 2018 at 3:27 AM, Du, Changbin wrote:
> Hi,
> On Wed, Feb 28, 2018 at 11:27:09AM +0100, Rafael J. Wysocki wrote:
>> On Wed, Feb 28, 2018 at 10:20 AM, wrote:
>> > From: Changbin Du
>> >
>>
[Fix up LKML address.]
On Thu, Mar 1, 2018 at 3:27 AM, Du, Changbin wrote:
> Hi,
> On Wed, Feb 28, 2018 at 11:27:09AM +0100, Rafael J. Wysocki wrote:
>> On Wed, Feb 28, 2018 at 10:20 AM, wrote:
>> > From: Changbin Du
>> >
>> > The type of state is signed int, convert it to unsigned int looks
On Wed, Feb 28, 2018 at 10:14:41AM +0100, Rafael J. Wysocki wrote:
> On 2/28/2018 3:45 AM, Du, Changbin wrote:
> > On Tue, Feb 27, 2018 at 05:39:38PM -0500, Steven Rostedt wrote:
> > > On Tue, 27 Feb 2018 17:35:27 +0800
> > > "Du, Changbin" wrote:
> > >
> > > > > From the
On Wed, Feb 28, 2018 at 10:14:41AM +0100, Rafael J. Wysocki wrote:
> On 2/28/2018 3:45 AM, Du, Changbin wrote:
> > On Tue, Feb 27, 2018 at 05:39:38PM -0500, Steven Rostedt wrote:
> > > On Tue, 27 Feb 2018 17:35:27 +0800
> > > "Du, Changbin" wrote:
> > >
> > > > > From the tracing perspective:
>
On 2/28/2018 3:45 AM, Du, Changbin wrote:
On Tue, Feb 27, 2018 at 05:39:38PM -0500, Steven Rostedt wrote:
On Tue, 27 Feb 2018 17:35:27 +0800
"Du, Changbin" wrote:
From the tracing perspective:
Acked-by: Steven Rostedt (VMware)
-- Steve
Hi
On 2/28/2018 3:45 AM, Du, Changbin wrote:
On Tue, Feb 27, 2018 at 05:39:38PM -0500, Steven Rostedt wrote:
On Tue, 27 Feb 2018 17:35:27 +0800
"Du, Changbin" wrote:
From the tracing perspective:
Acked-by: Steven Rostedt (VMware)
-- Steve
Hi Steve, will you pick this or someoneelse?
I
On Tue, Feb 27, 2018 at 05:39:38PM -0500, Steven Rostedt wrote:
> On Tue, 27 Feb 2018 17:35:27 +0800
> "Du, Changbin" wrote:
>
> > > From the tracing perspective:
> > >
> > > Acked-by: Steven Rostedt (VMware)
> > >
> > > -- Steve
> > >
> > Hi
On Tue, Feb 27, 2018 at 05:39:38PM -0500, Steven Rostedt wrote:
> On Tue, 27 Feb 2018 17:35:27 +0800
> "Du, Changbin" wrote:
>
> > > From the tracing perspective:
> > >
> > > Acked-by: Steven Rostedt (VMware)
> > >
> > > -- Steve
> > >
> > Hi Steve, will you pick this or someoneelse?
>
> I
[ Resending due to typo in LKML address ]
On Wed, 14 Feb 2018 10:40:38 +0800
changbin...@intel.com wrote:
> From: Changbin Du
>
> The type of state is signed int, convert it to unsigned int looks weird.
> (-1 become 4294967295)
>932.123 power:cpu_idle:state=1
[ Resending due to typo in LKML address ]
On Wed, 14 Feb 2018 10:40:38 +0800
changbin...@intel.com wrote:
> From: Changbin Du
>
> The type of state is signed int, convert it to unsigned int looks weird.
> (-1 become 4294967295)
>932.123 power:cpu_idle:state=1 cpu_id=0)
>932.125
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