On 05/05/2014 05:45 PM, Oleg Nesterov wrote:
> On 05/02, Denys Vlasenko wrote:
>> static inline unsigned long *
>> scratch_reg(struct arch_uprobe *auprobe, struct pt_regs *regs)
>> {
>> -return (auprobe->def.fixups & UPROBE_FIX_RIP_AX) ? >ax :
>> >cx;
>> +/* Order is important - more
sorry for noise,
On 05/05, Oleg Nesterov wrote:
>
> On 05/02, Denys Vlasenko wrote:
> >
> > v2: More robust checks of vex. (32-bit mode safe),
> > simplified scratch reg selection code,
> > moved comments around as requested by Oleg.
>
> OK, thanks. Given that this patch was acked by
On 05/02, Denys Vlasenko wrote:
>
> v2: More robust checks of vex. (32-bit mode safe),
> simplified scratch reg selection code,
> moved comments around as requested by Oleg.
OK, thanks. Given that this patch was acked by Jim, I am going to
apply it. I'll try to run a couple of
On 05/02, Denys Vlasenko wrote:
v2: More robust checks of vex. (32-bit mode safe),
simplified scratch reg selection code,
moved comments around as requested by Oleg.
OK, thanks. Given that this patch was acked by Jim, I am going to
apply it. I'll try to run a couple of systemtap
sorry for noise,
On 05/05, Oleg Nesterov wrote:
On 05/02, Denys Vlasenko wrote:
v2: More robust checks of vex. (32-bit mode safe),
simplified scratch reg selection code,
moved comments around as requested by Oleg.
OK, thanks. Given that this patch was acked by Jim, I am
On 05/05/2014 05:45 PM, Oleg Nesterov wrote:
On 05/02, Denys Vlasenko wrote:
static inline unsigned long *
scratch_reg(struct arch_uprobe *auprobe, struct pt_regs *regs)
{
-return (auprobe-def.fixups UPROBE_FIX_RIP_AX) ? regs-ax :
regs-cx;
+/* Order is important - more than one
On Fri, 2014-05-02 at 17:04 +0200, Denys Vlasenko wrote:
> Before this patch, instructions such as div, mul,
> shifts with count in CL, cmpxchg are mishandled.
I just noticed that this sounds rather worse than it is. It would be
more precise to say, "Before this patch, the rip-relative
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
This patch adds vex prefix handling. In particular,
it avoids colliding with register operand encoded
in vex. field.
Since we need to avoid two possible register operands,
the selection of
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
This patch adds vex prefix handling. In particular,
it avoids colliding with register operand encoded
in vex. field.
Since we need to avoid two possible register operands,
the selection of
On Fri, 2014-05-02 at 17:04 +0200, Denys Vlasenko wrote:
Before this patch, instructions such as div, mul,
shifts with count in CL, cmpxchg are mishandled.
I just noticed that this sounds rather worse than it is. It would be
more precise to say, Before this patch, the rip-relative addressing
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