On i.MX8M platforms the dram_apb and dram_alt are controlled from EL3. So in order to keep track of the actual clock tree in kernel, we need to actually declare the clocks but never write to any of their registes. We do that by registering the clocks with only the ops that read but never write the registers.
Changes since v1: * allow generic composite clock registration with .is_enabled gate op only Abel Vesa (5): clk: Add clk_gate_ro_ops for read-only gate clocks clk: Add CLK_GET_PARENT_NOCACHE flag clk: composite: Allow gate ops with only .is_enabled op clk: imx: composite-8m: Add DRAM clock registration variant clk: imx8m: Use dram variant registration for dram clocks drivers/clk/clk-composite.c | 19 ++++++++++--------- drivers/clk/clk-gate.c | 5 +++++ drivers/clk/clk.c | 31 +++++++++++++++++-------------- drivers/clk/imx/clk-composite-8m.c | 12 +++++++++++- drivers/clk/imx/clk-imx8mm.c | 4 ++-- drivers/clk/imx/clk-imx8mn.c | 4 ++-- drivers/clk/imx/clk-imx8mp.c | 4 ++-- drivers/clk/imx/clk-imx8mq.c | 4 ++-- drivers/clk/imx/clk.h | 7 +++++++ include/linux/clk-provider.h | 2 ++ 10 files changed, 60 insertions(+), 32 deletions(-) -- 2.7.4