2015-03-11 14:08 GMT+01:00 Philipp Zabel :
> Am Dienstag, den 10.03.2015, 22:20 +0100 schrieb Maxime Coquelin:
>> 2015-03-10 21:21 GMT+01:00 Arnd Bergmann :
>> > On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
>> >> 2015-03-10 16:02 GMT+01:00 Arnd Bergmann :
>> >> > On Friday 20 February
2015-03-11 14:08 GMT+01:00 Philipp Zabel p.za...@pengutronix.de:
Am Dienstag, den 10.03.2015, 22:20 +0100 schrieb Maxime Coquelin:
2015-03-10 21:21 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
2015-03-10 16:02 GMT+01:00 Arnd Bergmann
Am Dienstag, den 10.03.2015, 22:20 +0100 schrieb Maxime Coquelin:
> 2015-03-10 21:21 GMT+01:00 Arnd Bergmann :
> > On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
> >> 2015-03-10 16:02 GMT+01:00 Arnd Bergmann :
> >> > On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
> >> >> +/*
Am Dienstag, den 10.03.2015, 22:20 +0100 schrieb Maxime Coquelin:
2015-03-10 21:21 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
2015-03-10 16:02 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Friday 20 February 2015 19:01:06 Maxime Coquelin
2015-03-10 21:21 GMT+01:00 Arnd Bergmann :
> On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
>> 2015-03-10 16:02 GMT+01:00 Arnd Bergmann :
>> > On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
>> >> +/* AHB1 */
>> >> +#define GPIOA_RESET0
>> >> +#define GPIOB_RESET1
>>
On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
> 2015-03-10 16:02 GMT+01:00 Arnd Bergmann :
> > On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
> >> +/* AHB1 */
> >> +#define GPIOA_RESET0
> >> +#define GPIOB_RESET1
> >> +#define GPIOC_RESET2
> >> +#define
2015-03-10 16:02 GMT+01:00 Arnd Bergmann :
> On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
>> +/* AHB1 */
>> +#define GPIOA_RESET0
>> +#define GPIOB_RESET1
>> +#define GPIOC_RESET2
>> +#define GPIOD_RESET3
>> +#define GPIOE_RESET4
>> +#define GPIOF_RESET5
>>
2015-03-10 16:02 GMT+01:00 Arnd Bergmann :
> On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
>> +/* AHB1 */
>> +#define GPIOA_RESET0
>> +#define GPIOB_RESET1
>> +#define GPIOC_RESET2
>> +#define GPIOD_RESET3
>> +#define GPIOE_RESET4
>> +#define GPIOF_RESET5
>>
On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
> +/* AHB1 */
> +#define GPIOA_RESET0
> +#define GPIOB_RESET1
> +#define GPIOC_RESET2
> +#define GPIOD_RESET3
> +#define GPIOE_RESET4
> +#define GPIOF_RESET5
> +#define GPIOG_RESET6
> +#define GPIOH_RESET7
>
On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
+/* AHB1 */
+#define GPIOA_RESET0
+#define GPIOB_RESET1
+#define GPIOC_RESET2
+#define GPIOD_RESET3
+#define GPIOE_RESET4
+#define GPIOF_RESET5
+#define GPIOG_RESET6
+#define GPIOH_RESET7
+#define
2015-03-10 16:02 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
+/* AHB1 */
+#define GPIOA_RESET0
+#define GPIOB_RESET1
+#define GPIOC_RESET2
+#define GPIOD_RESET3
+#define GPIOE_RESET4
+#define GPIOF_RESET5
2015-03-10 16:02 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
+/* AHB1 */
+#define GPIOA_RESET0
+#define GPIOB_RESET1
+#define GPIOC_RESET2
+#define GPIOD_RESET3
+#define GPIOE_RESET4
+#define GPIOF_RESET5
On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
2015-03-10 16:02 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
+/* AHB1 */
+#define GPIOA_RESET0
+#define GPIOB_RESET1
+#define GPIOC_RESET2
+#define GPIOD_RESET
2015-03-10 21:21 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Tuesday 10 March 2015 16:44:24 Maxime Coquelin wrote:
2015-03-10 16:02 GMT+01:00 Arnd Bergmann a...@arndb.de:
On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
+/* AHB1 */
+#define GPIOA_RESET0
+#define GPIOB_RESET
The STM32 MCUs family IP can be reset by accessing some shared registers.
The specificity is that some reset lines are used by the timers.
At timer initialization time, the timer has to be reset, that's why
we cannot use a regular driver.
Signed-off-by: Maxime Coquelin
---
The STM32 MCUs family IP can be reset by accessing some shared registers.
The specificity is that some reset lines are used by the timers.
At timer initialization time, the timer has to be reset, that's why
we cannot use a regular driver.
Signed-off-by: Maxime Coquelin mcoquelin.st...@gmail.com
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