The clock controller dedicated to audio clocks also provides reset lines
on the g12 SoC family

Reviewed-by: Neil Armstrong <narmstr...@baylibre.com>
Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi 
b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index cd3d23d2c6a2..edbc30572958 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1434,6 +1434,7 @@
                                        compatible = "amlogic,g12a-audio-clkc";
                                        reg = <0x0 0x0 0x0 0xb4>;
                                        #clock-cells = <1>;
+                                       #reset-cells = <1>;
 
                                        clocks = <&clkc CLKID_AUDIO>,
                                                 <&clkc CLKID_MPLL0>,
-- 
2.21.0

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