On Wed, Apr 10, 2019 at 11:24 AM Viresh Kumar wrote:
>
> On 09-04-19, 13:25, Yangtao Li wrote:
> > +static const struct sunxi_cpufreq_soc_data sun50i_h6_data = {
> > + .efuse_xlate = sun50i_efuse_xlate,
> > + .nvmem_mask = 0x7,
> > + .nvmem_shift = 5,
> > +};
> > +
> > +static const
On 09-04-19, 13:25, Yangtao Li wrote:
> +static const struct sunxi_cpufreq_soc_data sun50i_h6_data = {
> + .efuse_xlate = sun50i_efuse_xlate,
> + .nvmem_mask = 0x7,
> + .nvmem_shift = 5,
> +};
> +
> +static const struct of_device_id sunxi_cpufreq_match_list[] = {
> + { .compatible
For some SoCs, the CPU frequency subset and voltage value of each OPP
varies based on the silicon variant in use. The sunxi-cpufreq-nvmem
driver reads the efuse value from the SoC to provide the OPP framework
with required information.
Signed-off-by: Yangtao Li
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