Hi Wenyou,
I see nothing wrong in it.
On Wed, Sep 30, 2015 at 03:25:49PM +0800, Wenyou Yang wrote:
> For the step-down DC/DC regulators, the output voltage is
> selectable by setting VSEL pin that when VSEL is low, output
> voltage is programmed by VSET1[] bits, and when VSEL is high,
> output
For the step-down DC/DC regulators, the output voltage is
selectable by setting VSEL pin that when VSEL is low, output
voltage is programmed by VSET1[] bits, and when VSEL is high,
output voltage is programmed by VSET2[] bits.
The DT property "active-semi,vsel-high" is used to specify
the VSEL
For the step-down DC/DC regulators, the output voltage is
selectable by setting VSEL pin that when VSEL is low, output
voltage is programmed by VSET1[] bits, and when VSEL is high,
output voltage is programmed by VSET2[] bits.
The DT property "active-semi,vsel-high" is used to specify
the VSEL
Hi Wenyou,
I see nothing wrong in it.
On Wed, Sep 30, 2015 at 03:25:49PM +0800, Wenyou Yang wrote:
> For the step-down DC/DC regulators, the output voltage is
> selectable by setting VSEL pin that when VSEL is low, output
> voltage is programmed by VSET1[] bits, and when VSEL is high,
> output
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