On Wed, 2014-10-08 at 18:21 +0200, leroy christophe wrote:
> Le 07/10/2014 02:15, Scott Wood a écrit :
> > On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote:
> >> What should it look like if that offset had to be in the device tree ?
> > If the offset is not relocatable or discoverable, it
Le 07/10/2014 02:15, Scott Wood a écrit :
On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote:
Le 03/10/2014 22:29, Scott Wood a écrit :
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram()
there was
Le 07/10/2014 02:15, Scott Wood a écrit :
On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote:
Le 03/10/2014 22:29, Scott Wood a écrit :
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram()
there was
On Wed, 2014-10-08 at 18:21 +0200, leroy christophe wrote:
Le 07/10/2014 02:15, Scott Wood a écrit :
On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote:
What should it look like if that offset had to be in the device tree ?
If the offset is not relocatable or discoverable, it should
On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote:
> Le 03/10/2014 22:29, Scott Wood a écrit :
> > On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
> >> On CPM1, the SPI parameter RAM has a default location. In
> >> fsl_spi_cpm_get_pram()
> >> there was a confusion between the
On Sat, 2014-10-04 at 14:02 +0200, christophe leroy wrote:
Le 03/10/2014 22:29, Scott Wood a écrit :
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
On CPM1, the SPI parameter RAM has a default location. In
fsl_spi_cpm_get_pram()
there was a confusion between the SPI_BASE
Le 03/10/2014 22:29, Scott Wood a écrit :
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram()
there was a confusion between the SPI_BASE register and the base of the SPI
parameter RAM. Fortunatly, it was
Le 03/10/2014 22:29, Scott Wood a écrit :
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram()
there was a confusion between the SPI_BASE register and the base of the SPI
parameter RAM. Fortunatly, it was
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
> On CPM1, the SPI parameter RAM has a default location. In
> fsl_spi_cpm_get_pram()
> there was a confusion between the SPI_BASE register and the base of the SPI
> parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram()
there was a confusion between the SPI_BASE register and the base of the SPI
parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885
because they do set SPI_BASE, but on MPC860 and other old MPC8xx
On CPM1, the SPI parameter RAM has a default location. In fsl_spi_cpm_get_pram()
there was a confusion between the SPI_BASE register and the base of the SPI
parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885
because they do set SPI_BASE, but on MPC860 and other old MPC8xx
On Fri, 2014-10-03 at 18:49 +0200, Christophe Leroy wrote:
On CPM1, the SPI parameter RAM has a default location. In
fsl_spi_cpm_get_pram()
there was a confusion between the SPI_BASE register and the base of the SPI
parameter RAM. Fortunatly, it was working properly with MPC866 and MPC885
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