Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-07 Thread Andrew Jeffery
On Mon, 2016-11-07 at 10:34 +0100, Linus Walleij wrote: > > On Thu, Nov 3, 2016 at 11:59 PM, Joel Stanley wrote: > > > In the future I think we should send fixes separately from the rest of > > the series, so it's clear to Linus where we expect patches to end up. > > > > Perhaps

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-07 Thread Andrew Jeffery
On Mon, 2016-11-07 at 10:34 +0100, Linus Walleij wrote: > > On Thu, Nov 3, 2016 at 11:59 PM, Joel Stanley wrote: > > > In the future I think we should send fixes separately from the rest of > > the series, so it's clear to Linus where we expect patches to end up. > > > > Perhaps Linus can share

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-07 Thread Linus Walleij
On Thu, Nov 3, 2016 at 11:59 PM, Joel Stanley wrote: > In the future I think we should send fixes separately from the rest of > the series, so it's clear to Linus where we expect patches to end up. > > Perhaps Linus can share his preference with us? Just make it clear to me

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-07 Thread Linus Walleij
On Thu, Nov 3, 2016 at 11:59 PM, Joel Stanley wrote: > In the future I think we should send fixes separately from the rest of > the series, so it's clear to Linus where we expect patches to end up. > > Perhaps Linus can share his preference with us? Just make it clear to me where the patch is

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-07 Thread Linus Walleij
On Wed, Nov 2, 2016 at 3:37 PM, Andrew Jeffery wrote: > If a pin depending on bit 6 in SCU90 is requested for GPIO, the export > will succeed but changes to the GPIO's value will not be accepted by the > hardware. This is because the pinmux driver has misconfigured the SCU by >

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-07 Thread Linus Walleij
On Wed, Nov 2, 2016 at 3:37 PM, Andrew Jeffery wrote: > If a pin depending on bit 6 in SCU90 is requested for GPIO, the export > will succeed but changes to the GPIO's value will not be accepted by the > hardware. This is because the pinmux driver has misconfigured the SCU by > writing 1 to the

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-03 Thread Joel Stanley
On Thu, Nov 3, 2016 at 1:07 AM, Andrew Jeffery wrote: > If a pin depending on bit 6 in SCU90 is requested for GPIO, the export > will succeed but changes to the GPIO's value will not be accepted by the > hardware. This is because the pinmux driver has misconfigured the SCU by >

Re: [PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-03 Thread Joel Stanley
On Thu, Nov 3, 2016 at 1:07 AM, Andrew Jeffery wrote: > If a pin depending on bit 6 in SCU90 is requested for GPIO, the export > will succeed but changes to the GPIO's value will not be accepted by the > hardware. This is because the pinmux driver has misconfigured the SCU by > writing 1 to the

[PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-02 Thread Andrew Jeffery
If a pin depending on bit 6 in SCU90 is requested for GPIO, the export will succeed but changes to the GPIO's value will not be accepted by the hardware. This is because the pinmux driver has misconfigured the SCU by writing 1 to the reserved bit. The description of SCU90[6] from the datasheet is

[PATCH v2 1/6] pinctrl-aspeed-g5: Never set SCU90[6]

2016-11-02 Thread Andrew Jeffery
If a pin depending on bit 6 in SCU90 is requested for GPIO, the export will succeed but changes to the GPIO's value will not be accepted by the hardware. This is because the pinmux driver has misconfigured the SCU by writing 1 to the reserved bit. The description of SCU90[6] from the datasheet is