Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 09:31 AM, Geert Uytterhoeven wrote: > On Fri, May 23, 2014 at 5:56 PM, Peter Zijlstra wrote: >> So the one issue I had with that, is that if one tries to send an email >> to all arch maintainers + linux-arch + linux-kernel, the header gets too >> big and vger chokes and davem slaps

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Geert Uytterhoeven
On Fri, May 23, 2014 at 5:56 PM, Peter Zijlstra wrote: > So the one issue I had with that, is that if one tries to send an email > to all arch maintainers + linux-arch + linux-kernel, the header gets too > big and vger chokes and davem slaps you. The arch maintainers are (supposed to be) on

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Peter Zijlstra
On Fri, May 23, 2014 at 09:12:31AM -0700, H. Peter Anvin wrote: > > So the one issue I had with that, is that if one tries to send an > > email to all arch maintainers + linux-arch + linux-kernel, the > > header gets too big and vger chokes and davem slaps you. > > > > So while its possibly

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 08:56 AM, Peter Zijlstra wrote: > On Fri, May 23, 2014 at 08:43:01AM -0700, H. Peter Anvin wrote: >> On 05/23/2014 08:34 AM, Will Deacon wrote: >>> >>> There is also a documentation patch [1] in this series but, >>> again, I didn't CC everybody on it. Sorry, but the level of >>>

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Peter Zijlstra
On Fri, May 23, 2014 at 08:43:01AM -0700, H. Peter Anvin wrote: > On 05/23/2014 08:34 AM, Will Deacon wrote: > > > > There is also a documentation patch [1] in this series but, again, I didn't > > CC everybody on it. Sorry, but the level of interest this sort of stuff > > generates amongst kernel

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 08:34 AM, Will Deacon wrote: > > There is also a documentation patch [1] in this series but, again, I didn't > CC everybody on it. Sorry, but the level of interest this sort of stuff > generates amongst kernel developers is close to zero so I only included > people I thought cared

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Will Deacon
On Fri, May 23, 2014 at 04:20:08PM +0100, H. Peter Anvin wrote: > On 05/23/2014 07:57 AM, Will Deacon wrote: > > On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote: > >> On 05/23/2014 07:46 AM, Will Deacon wrote: > >>> I would like the relaxed accessors to be ordered with respect to

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 07:57 AM, Will Deacon wrote: > On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote: >> On 05/23/2014 07:46 AM, Will Deacon wrote: >>> >>> I would like the relaxed accessors to be ordered with respect to each >>> other... >>> >>> What do you think? >>> >> >> I think "I

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Will Deacon
On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote: > On 05/23/2014 07:46 AM, Will Deacon wrote: > > > > I would like the relaxed accessors to be ordered with respect to each > > other... > > > > What do you think? > > > > I think "I would like" isn't a very good motivation. What

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 07:46 AM, Will Deacon wrote: > > I would like the relaxed accessors to be ordered with respect to each other... > > What do you think? > I think "I would like" isn't a very good motivation. What are the semantics of these things supposed to be? It seems more than a bit odd to

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Will Deacon
Hi Peter, On Thu, May 22, 2014 at 06:15:27PM +0100, H. Peter Anvin wrote: > On 05/22/2014 09:47 AM, Will Deacon wrote: > > write{b,w,l,q}_relaxed are implemented by some architectures in order to > > permit memory-mapped I/O accesses with weaker barrier semantics than the > > non-relaxed

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Will Deacon
Hi Peter, On Thu, May 22, 2014 at 06:15:27PM +0100, H. Peter Anvin wrote: On 05/22/2014 09:47 AM, Will Deacon wrote: write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants.

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 07:46 AM, Will Deacon wrote: I would like the relaxed accessors to be ordered with respect to each other... What do you think? I think I would like isn't a very good motivation. What are the semantics of these things supposed to be? It seems more than a bit odd to require

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Will Deacon
On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote: On 05/23/2014 07:46 AM, Will Deacon wrote: I would like the relaxed accessors to be ordered with respect to each other... What do you think? I think I would like isn't a very good motivation. What are the

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 07:57 AM, Will Deacon wrote: On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote: On 05/23/2014 07:46 AM, Will Deacon wrote: I would like the relaxed accessors to be ordered with respect to each other... What do you think? I think I would like isn't a very good

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Will Deacon
On Fri, May 23, 2014 at 04:20:08PM +0100, H. Peter Anvin wrote: On 05/23/2014 07:57 AM, Will Deacon wrote: On Fri, May 23, 2014 at 03:53:20PM +0100, H. Peter Anvin wrote: On 05/23/2014 07:46 AM, Will Deacon wrote: I would like the relaxed accessors to be ordered with respect to each

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 08:34 AM, Will Deacon wrote: There is also a documentation patch [1] in this series but, again, I didn't CC everybody on it. Sorry, but the level of interest this sort of stuff generates amongst kernel developers is close to zero so I only included people I thought cared on CC

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Peter Zijlstra
On Fri, May 23, 2014 at 08:43:01AM -0700, H. Peter Anvin wrote: On 05/23/2014 08:34 AM, Will Deacon wrote: There is also a documentation patch [1] in this series but, again, I didn't CC everybody on it. Sorry, but the level of interest this sort of stuff generates amongst kernel

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 08:56 AM, Peter Zijlstra wrote: On Fri, May 23, 2014 at 08:43:01AM -0700, H. Peter Anvin wrote: On 05/23/2014 08:34 AM, Will Deacon wrote: There is also a documentation patch [1] in this series but, again, I didn't CC everybody on it. Sorry, but the level of interest this sort

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Peter Zijlstra
On Fri, May 23, 2014 at 09:12:31AM -0700, H. Peter Anvin wrote: So the one issue I had with that, is that if one tries to send an email to all arch maintainers + linux-arch + linux-kernel, the header gets too big and vger chokes and davem slaps you. So while its possibly desirable to do

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread Geert Uytterhoeven
On Fri, May 23, 2014 at 5:56 PM, Peter Zijlstra pet...@infradead.org wrote: So the one issue I had with that, is that if one tries to send an email to all arch maintainers + linux-arch + linux-kernel, the header gets too big and vger chokes and davem slaps you. The arch maintainers are

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-23 Thread H. Peter Anvin
On 05/23/2014 09:31 AM, Geert Uytterhoeven wrote: On Fri, May 23, 2014 at 5:56 PM, Peter Zijlstra pet...@infradead.org wrote: So the one issue I had with that, is that if one tries to send an email to all arch maintainers + linux-arch + linux-kernel, the header gets too big and vger chokes and

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-22 Thread H. Peter Anvin
On 05/22/2014 09:47 AM, Will Deacon wrote: > write{b,w,l,q}_relaxed are implemented by some architectures in order to > permit memory-mapped I/O accesses with weaker barrier semantics than the > non-relaxed variants. > > This patch adds dummy macros for the read and write accessors to x86, >

[PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-22 Thread Will Deacon
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the read and write accessors to x86, which simply expand to the non-relaxed variants. Note that

[PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-22 Thread Will Deacon
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the read and write accessors to x86, which simply expand to the non-relaxed variants. Note that

Re: [PATCH v2 16/18] x86: io: implement dummy relaxed accessor macros for writes

2014-05-22 Thread H. Peter Anvin
On 05/22/2014 09:47 AM, Will Deacon wrote: write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O accesses with weaker barrier semantics than the non-relaxed variants. This patch adds dummy macros for the read and write accessors to x86, which