Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 07:02:00PM +0530, Vineet Gupta wrote: > > You should never report more than PERF_MAX_STACK_DEPTH thingies anyway, > > so once you've done that many loops, you're good to bail, right? > > Yeah, although I need to ensure if arch code needs to check that. Plus the > unwinder

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tuesday 17 November 2015 06:14 PM, Peter Zijlstra wrote: > On Tue, Nov 17, 2015 at 06:07:08PM +0530, Vineet Gupta wrote: >> On Tuesday 17 November 2015 05:52 PM, Peter Zijlstra wrote: > BTW since we are on the topic we have this loop in stack unwinder which > can > potentially

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 06:07:08PM +0530, Vineet Gupta wrote: > On Tuesday 17 November 2015 05:52 PM, Peter Zijlstra wrote: > >> > BTW since we are on the topic we have this loop in stack unwinder which > >> > can > >> > potentially cause RCU stalls, actual lockups etc. I was planning to add >

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tuesday 17 November 2015 05:52 PM, Peter Zijlstra wrote: >> > BTW since we are on the topic we have this loop in stack unwinder which can >> > potentially cause RCU stalls, actual lockups etc. I was planning to add the >> > following - does that seem fine to you. > Worries me more than

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 05:07:38PM +0530, Vineet Gupta wrote: > > as is ARC-SMP seems to have a _lot_ of superfluous > > barriers many of which have no explanation yet (I'm thinking of those > > extra smp_mb()s in the lock primitives). > > Other than the lock primitives can u think of any more.

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tuesday 17 November 2015 04:53 PM, Peter Zijlstra wrote: > On Tue, Nov 17, 2015 at 04:42:49PM +0530, Vineet Gupta wrote: >> On Saturday 07 November 2015 04:22 PM, Noam Camus wrote: >>> From: Tal Zilcer >>> >>> In SMT system like we have the generic "sync" is not working with >>> HW threads.

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 04:42:49PM +0530, Vineet Gupta wrote: > On Saturday 07 November 2015 04:22 PM, Noam Camus wrote: > > From: Tal Zilcer > > > > In SMT system like we have the generic "sync" is not working with > > HW threads. The replacement is "schd.rw" instruction that is served > > as

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Saturday 07 November 2015 04:22 PM, Noam Camus wrote: > From: Tal Zilcer > > In SMT system like we have the generic "sync" is not working with > HW threads. The replacement is "schd.rw" instruction that is served > as cpu barrier for HW threads. As discussed in v2 of this patch, SYNC or some

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tuesday 17 November 2015 06:14 PM, Peter Zijlstra wrote: > On Tue, Nov 17, 2015 at 06:07:08PM +0530, Vineet Gupta wrote: >> On Tuesday 17 November 2015 05:52 PM, Peter Zijlstra wrote: > BTW since we are on the topic we have this loop in stack unwinder which > can > potentially

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tuesday 17 November 2015 04:53 PM, Peter Zijlstra wrote: > On Tue, Nov 17, 2015 at 04:42:49PM +0530, Vineet Gupta wrote: >> On Saturday 07 November 2015 04:22 PM, Noam Camus wrote: >>> From: Tal Zilcer >>> >>> In SMT system like we have the generic "sync" is not working with

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 05:07:38PM +0530, Vineet Gupta wrote: > > as is ARC-SMP seems to have a _lot_ of superfluous > > barriers many of which have no explanation yet (I'm thinking of those > > extra smp_mb()s in the lock primitives). > > Other than the lock primitives can u think of any more.

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 06:07:08PM +0530, Vineet Gupta wrote: > On Tuesday 17 November 2015 05:52 PM, Peter Zijlstra wrote: > >> > BTW since we are on the topic we have this loop in stack unwinder which > >> > can > >> > potentially cause RCU stalls, actual lockups etc. I was planning to add >

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 04:42:49PM +0530, Vineet Gupta wrote: > On Saturday 07 November 2015 04:22 PM, Noam Camus wrote: > > From: Tal Zilcer > > > > In SMT system like we have the generic "sync" is not working with > > HW threads. The replacement is "schd.rw" instruction that

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tue, Nov 17, 2015 at 07:02:00PM +0530, Vineet Gupta wrote: > > You should never report more than PERF_MAX_STACK_DEPTH thingies anyway, > > so once you've done that many loops, you're good to bail, right? > > Yeah, although I need to ensure if arch code needs to check that. Plus the > unwinder

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Saturday 07 November 2015 04:22 PM, Noam Camus wrote: > From: Tal Zilcer > > In SMT system like we have the generic "sync" is not working with > HW threads. The replacement is "schd.rw" instruction that is served > as cpu barrier for HW threads. As discussed in v2 of this

Re: [PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

On Tuesday 17 November 2015 05:52 PM, Peter Zijlstra wrote: >> > BTW since we are on the topic we have this loop in stack unwinder which can >> > potentially cause RCU stalls, actual lockups etc. I was planning to add the >> > following - does that seem fine to you. > Worries me more than

[PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

From: Tal Zilcer In SMT system like we have the generic "sync" is not working with HW threads. The replacement is "schd.rw" instruction that is served as cpu barrier for HW threads. Signed-off-by: Noam Camus --- arch/arc/kernel/ctx_sw.c |7 +++ 1 files changed, 7 insertions(+), 0

[PATCH v2 18/19] ARC: [plat-eznps] replace sync with proper cpu barrier

From: Tal Zilcer In SMT system like we have the generic "sync" is not working with HW threads. The replacement is "schd.rw" instruction that is served as cpu barrier for HW threads. Signed-off-by: Noam Camus --- arch/arc/kernel/ctx_sw.c |7 +++ 1