On 8/20/2019 9:42 PM, Rob Herring wrote:
On Tue, Aug 20, 2019 at 4:40 AM Dilip Kota wrote:
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway soc.
Run 'make dt_binding_check' and fix all the warnings.
On Tue, Aug 20, 2019 at 4:40 AM Dilip Kota wrote:
>
> The Intel PCIe RC controller is Synopsys Designware
> based PCIe core. Add YAML schemas for PCIe in RC mode
> present in Intel Universal Gateway soc.
Run 'make dt_binding_check' and fix all the warnings.
>
> Signed-off-by: Dilip Kota
> ---
The Intel PCIe RC controller is Synopsys Designware
based PCIe core. Add YAML schemas for PCIe in RC mode
present in Intel Universal Gateway soc.
Signed-off-by: Dilip Kota
---
.../devicetree/bindings/pci/intel-pcie.yaml| 133 +
1 file changed, 133 insertions(+)
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