Re: [PATCH v2 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

2014-03-22 Thread Paolo Bonzini
Il 21/03/2014 19:34, Eduardo Habkost ha scritto: > + if (irqe.trig_mode == IOAPIC_EDGE_TRIG) > + ioapic->irr &= ~(1 << irq); > + Now, every call to ioapic_service() for an edge interrupt clears the IRR bit immediately (assuming the mask is unset). If the IRR bit is immediately zero

Re: [PATCH v2 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

2014-03-22 Thread Paolo Bonzini
Il 21/03/2014 19:34, Eduardo Habkost ha scritto: + if (irqe.trig_mode == IOAPIC_EDGE_TRIG) + ioapic-irr = ~(1 irq); + Now, every call to ioapic_service() for an edge interrupt clears the IRR bit immediately (assuming the mask is unset). If the IRR bit is immediately zero on

Re: [PATCH v2 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

2014-03-21 Thread Eduardo Habkost
On Fri, Mar 21, 2014 at 10:27:59AM +0100, Paolo Bonzini wrote: > This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if > the interrupt is still sitting in the IOAPIC. After the next patches, it > avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is > called. >

[PATCH v2 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

2014-03-21 Thread Paolo Bonzini
This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if the interrupt is still sitting in the IOAPIC. After the next patches, it avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is called. Reviewed-by: Alex Williamson Signed-off-by: Paolo Bonzini ---

[PATCH v2 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

2014-03-21 Thread Paolo Bonzini
This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if the interrupt is still sitting in the IOAPIC. After the next patches, it avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is called. Reviewed-by: Alex Williamson alex.william...@redhat.com Signed-off-by:

Re: [PATCH v2 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

2014-03-21 Thread Eduardo Habkost
On Fri, Mar 21, 2014 at 10:27:59AM +0100, Paolo Bonzini wrote: This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if the interrupt is still sitting in the IOAPIC. After the next patches, it avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is called.