Re: [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC

2020-07-20 Thread Xu Yilun
On Tue, Jul 21, 2020 at 11:47:13AM +0800, Xu Yilun wrote: > On Fri, Jul 17, 2020 at 07:16:09PM +0100, Mark Brown wrote: > > On Thu, Jul 16, 2020 at 06:42:54PM +0800, Xu Yilun wrote: > > > > > +static const struct spi_device_id m10bmc_spi_id[] = { > > > + { "m10-n3000", M10_N3000 }, > > > + { } >

Re: [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC

2020-07-20 Thread Xu Yilun
On Fri, Jul 17, 2020 at 07:16:09PM +0100, Mark Brown wrote: > On Thu, Jul 16, 2020 at 06:42:54PM +0800, Xu Yilun wrote: > > > +static const struct spi_device_id m10bmc_spi_id[] = { > > + { "m10-n3000", M10_N3000 }, > > + { } > > +}; > > +MODULE_DEVICE_TABLE(spi, m10bmc_spi_id); > > > +static

Re: [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC

2020-07-20 Thread Xu Yilun
On Fri, Jul 17, 2020 at 10:45:42AM +0100, Lee Jones wrote: > On Thu, 16 Jul 2020, Xu Yilun wrote: > > > This patch implements the basic functions of the BMC chip for some Intel > > FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the > > intel max10 CPLD. > > > > This BMC chip is

Re: [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC

2020-07-17 Thread Mark Brown
On Thu, Jul 16, 2020 at 06:42:54PM +0800, Xu Yilun wrote: > +static const struct spi_device_id m10bmc_spi_id[] = { > + { "m10-n3000", M10_N3000 }, > + { } > +}; > +MODULE_DEVICE_TABLE(spi, m10bmc_spi_id); > +static struct spi_driver intel_m10bmc_spi_driver = { > + .driver = { > +

Re: [PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC

2020-07-17 Thread Lee Jones
On Thu, 16 Jul 2020, Xu Yilun wrote: > This patch implements the basic functions of the BMC chip for some Intel > FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the > intel max10 CPLD. > > This BMC chip is connected to FPGA by a SPI bus. To provide reliable > register access

[PATCH v2 3/3] mfd: intel-m10-bmc: add Max10 BMC chip support for Intel FPGA PAC

2020-07-16 Thread Xu Yilun
This patch implements the basic functions of the BMC chip for some Intel FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the intel max10 CPLD. This BMC chip is connected to FPGA by a SPI bus. To provide reliable register access from FPGA, an Avalon Memory-Mapped (Avmm)