Hi,
Am Donnerstag, 24. September 2015, 11:31:58 schrieb Xing Zheng:
> On 2015年09月24日 11:04, Xing Zheng wrote:
> >>> #define RK3066_PLL_RATE(_rate, _nr, _nf, _no)\
> >>>
> >>> @@ -95,12 +106,31 @@ enum rockchip_pll_type {
> >>>
> >>> .nb = _nb,\
> >>>
> >>>
On 2015年09月24日 11:04, Xing Zheng wrote:
#define RK3066_PLL_RATE(_rate, _nr, _nf, _no)\
@@ -95,12 +106,31 @@ enum rockchip_pll_type {
.nb = _nb,\
}
+#define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1,\
+_postdiv2, _dsmpd, _frac)
On 2015年09月17日 17:47, Heiko Stübner wrote:
Hi,
Am Donnerstag, 17. September 2015, 16:28:54 schrieb Xing Zheng:
Add the clock tree definition for the new rk3036 SoC.
Signed-off-by: Xing Zheng
missing a dt-bindings document in a separate patch. See "dt-bindings: add
documentation of rk3668 cloc
Hi,
Am Donnerstag, 17. September 2015, 16:28:54 schrieb Xing Zheng:
> Add the clock tree definition for the new rk3036 SoC.
>
> Signed-off-by: Xing Zheng
missing a dt-bindings document in a separate patch. See "dt-bindings: add
documentation of rk3668 clock controller"
(http://lists.infradead
Add the clock tree definition for the new rk3036 SoC.
Signed-off-by: Xing Zheng
---
Changes in v2: None
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk-rk3036.c | 504 +
drivers/clk/rockchip/clk.h| 30 +++
3 files changed, 535
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