[PATCH v2 4/4] ARM: AM33XX: clock: SET_RATE_PARENT in lcd path

LCDC clock node is a one that does not have set rate capability. It just passes on the rate that is sent downstream by it's parent. While lcdc clock parent and it's grand parent - dpll_disp_m2_ck and dpll_disp_ck has the capability to configure rate. And the default rates provided by LCDC clock's

[PATCH v2 4/4] ARM: AM33XX: clock: SET_RATE_PARENT in lcd path

LCDC clock node is a one that does not have set rate capability. It just passes on the rate that is sent downstream by it's parent. While lcdc clock parent and it's grand parent - dpll_disp_m2_ck and dpll_disp_ck has the capability to configure rate. And the default rates provided by LCDC clock's