Re: [PATCH v3] RISC-V: Implement ASID allocator

2019-04-25 Thread Michael Clark
>> On 25/04/2019, at 11:36 AM, Palmer Dabbelt wrote: >> >> On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote: >> Currently, we do local TLB flush on every MM switch. This is very harsh on >> performance because we are forcing page table walks after every MM switch. >> >>

Re: [PATCH v3] RISC-V: Implement ASID allocator

2019-04-24 Thread Anup Patel
ts.infradead.org; linux- > > ker...@vger.kernel.org List > > Subject: Re: [PATCH v3] RISC-V: Implement ASID allocator > > > > On Thu, Apr 25, 2019 at 5:06 AM Palmer Dabbelt wrote: > > > > > > On Thu, 28 Mar 2019 21:51:38 PDT (-0

RE: [PATCH v3] RISC-V: Implement ASID allocator

2019-04-24 Thread Anup Patel
x- > ker...@vger.kernel.org List > Subject: RE: [PATCH v3] RISC-V: Implement ASID allocator > > This patch absolutely does not work with a hardware that implements ASID > feature. Aside from many corner cases, it does not even boot on a hardware > with ASID implemented. It only wor

RE: [PATCH v3] RISC-V: Implement ASID allocator

2019-04-24 Thread Gary Guo
sts.infradead.org; linux- > ker...@vger.kernel.org List > Subject: Re: [PATCH v3] RISC-V: Implement ASID allocator > > On Thu, Apr 25, 2019 at 5:06 AM Palmer Dabbelt wrote: > > > > On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote: > > > Currentl

Re: [PATCH v3] RISC-V: Implement ASID allocator

2019-04-24 Thread Anup Patel
On Thu, Apr 25, 2019 at 5:06 AM Palmer Dabbelt wrote: > > On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote: > > Currently, we do local TLB flush on every MM switch. This is very harsh on > > performance because we are forcing page table walks after every MM switch. > > > > This

Re: [PATCH v3] RISC-V: Implement ASID allocator

2019-04-24 Thread Palmer Dabbelt
On Thu, 28 Mar 2019 21:51:38 PDT (-0700), anup.pa...@wdc.com wrote: Currently, we do local TLB flush on every MM switch. This is very harsh on performance because we are forcing page table walks after every MM switch. This patch implements ASID allocator for assigning an ASID to a MM context.

[PATCH v3] RISC-V: Implement ASID allocator

2019-03-28 Thread Anup Patel
Currently, we do local TLB flush on every MM switch. This is very harsh on performance because we are forcing page table walks after every MM switch. This patch implements ASID allocator for assigning an ASID to a MM context. The number of ASIDs are limited in HW so we create a logical entity