[PATCH v3 0/4] Handle #GP for SVM execution instructions

While running SVM related instructions (VMRUN/VMSAVE/VMLOAD), some AMD CPUs check EAX against reserved memory regions (e.g. SMM memory on host) before checking VMCB's instruction intercept. If EAX falls into such memory areas, #GP is triggered before #VMEXIT. This causes unexpected #GP under nested

Re: [PATCH v3 0/4] Handle #GP for SVM execution instructions

On 1/26/21 5:39 AM, Paolo Bonzini wrote: On 26/01/21 09:18, Wei Huang wrote: While running SVM related instructions (VMRUN/VMSAVE/VMLOAD), some AMD CPUs check EAX against reserved memory regions (e.g. SMM memory on host) before checking VMCB's instruction intercept. If EAX falls into such mem

Re: [PATCH v3 0/4] Handle #GP for SVM execution instructions

On 26/01/21 09:18, Wei Huang wrote: While running SVM related instructions (VMRUN/VMSAVE/VMLOAD), some AMD CPUs check EAX against reserved memory regions (e.g. SMM memory on host) before checking VMCB's instruction intercept. If EAX falls into such memory areas, #GP is triggered before #VMEXIT. T