Marc,
On Mon, Nov 24, 2014 at 02:35:07PM +, Marc Zyngier wrote:
> The GICv3 architecture provides a way to implement support for
> MSI/MSI-X using a specific block called the ITS (Interrupt Translation
> Service).
>
> The ITS can be accurately described as "page tables for
> interrupts". If
Marc,
On Mon, Nov 24, 2014 at 02:35:07PM +, Marc Zyngier wrote:
The GICv3 architecture provides a way to implement support for
MSI/MSI-X using a specific block called the ITS (Interrupt Translation
Service).
The ITS can be accurately described as page tables for
interrupts. If you
The GICv3 architecture provides a way to implement support for
MSI/MSI-X using a specific block called the ITS (Interrupt Translation
Service).
The ITS can be accurately described as "page tables for
interrupts". If you think this sounds scary, you're spot on. It uses a
set of opaque memory
The GICv3 architecture provides a way to implement support for
MSI/MSI-X using a specific block called the ITS (Interrupt Translation
Service).
The ITS can be accurately described as page tables for
interrupts. If you think this sounds scary, you're spot on. It uses a
set of opaque memory tables
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