Re: [PATCH v3 00/13] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)

2014-11-26 Thread Jason Cooper
Marc, On Mon, Nov 24, 2014 at 02:35:07PM +, Marc Zyngier wrote: > The GICv3 architecture provides a way to implement support for > MSI/MSI-X using a specific block called the ITS (Interrupt Translation > Service). > > The ITS can be accurately described as "page tables for > interrupts". If

Re: [PATCH v3 00/13] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)

2014-11-26 Thread Jason Cooper
Marc, On Mon, Nov 24, 2014 at 02:35:07PM +, Marc Zyngier wrote: The GICv3 architecture provides a way to implement support for MSI/MSI-X using a specific block called the ITS (Interrupt Translation Service). The ITS can be accurately described as page tables for interrupts. If you

[PATCH v3 00/13] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)

2014-11-24 Thread Marc Zyngier
The GICv3 architecture provides a way to implement support for MSI/MSI-X using a specific block called the ITS (Interrupt Translation Service). The ITS can be accurately described as "page tables for interrupts". If you think this sounds scary, you're spot on. It uses a set of opaque memory

[PATCH v3 00/13] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition)

2014-11-24 Thread Marc Zyngier
The GICv3 architecture provides a way to implement support for MSI/MSI-X using a specific block called the ITS (Interrupt Translation Service). The ITS can be accurately described as page tables for interrupts. If you think this sounds scary, you're spot on. It uses a set of opaque memory tables