On Thu, Aug 04, 2016 at 06:27:57PM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 01:31:12AM -0400, Rich Felker wrote:
> > On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote:
> > > On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> > > > The J-Core project
On Thu, Aug 04, 2016 at 06:27:57PM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 01:31:12AM -0400, Rich Felker wrote:
> > On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote:
> > > On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> > > > The J-Core project (j-core.org) produces
On Wed, Jul 27, 2016 at 01:31:12AM -0400, Rich Felker wrote:
> On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote:
> > On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> > > The J-Core project (j-core.org) produces open source cpu and SoC
> > > peripheral cores
On Wed, Jul 27, 2016 at 01:31:12AM -0400, Rich Felker wrote:
> On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote:
> > On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> > > The J-Core project (j-core.org) produces open source cpu and SoC
> > > peripheral cores synthesizable as FPGA
On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote:
> On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> > The J-Core project (j-core.org) produces open source cpu and SoC
> > peripheral cores synthesizable as FPGA bitstreams or ASICs.
> >
> > Signed-off-by: Rich
On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote:
> On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> > The J-Core project (j-core.org) produces open source cpu and SoC
> > peripheral cores synthesizable as FPGA bitstreams or ASICs.
> >
> > Signed-off-by: Rich Felker
>
> Please
On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> The J-Core project (j-core.org) produces open source cpu and SoC
> peripheral cores synthesizable as FPGA bitstreams or ASICs.
>
> Signed-off-by: Rich Felker
Please add acks when posting subsequent
On Wed, May 25, 2016 at 12:43 AM, Rich Felker wrote:
> The J-Core project (j-core.org) produces open source cpu and SoC
> peripheral cores synthesizable as FPGA bitstreams or ASICs.
>
> Signed-off-by: Rich Felker
Please add acks when posting subsequent versions.
> ---
>
The J-Core project (j-core.org) produces open source cpu and SoC
peripheral cores synthesizable as FPGA bitstreams or ASICs.
Signed-off-by: Rich Felker
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
The J-Core project (j-core.org) produces open source cpu and SoC
peripheral cores synthesizable as FPGA bitstreams or ASICs.
Signed-off-by: Rich Felker
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
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