Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-30 Thread Chris Packham
Hi Miquel, On 09/10/17 19:19, Miquel RAYNAL wrote: > Hello Kalyan, > > On Mon, 9 Oct 2017 02:31:30 + > Kalyan Kinthada wrote: > >> On 05/10/17 20:41, Miquel RAYNAL wrote: >>> Hello Kalyan, >>> >>> On Thu, 28 Sep 2017 13:57:56 +1300 >>> Kalyan Kinthada wrote: >>> When the arbitratio

Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-15 Thread Chris Packham
Hi Boris, On 15/10/17 02:13, Boris Brezillon wrote: > Hi Kalyan, > > On Thu, 28 Sep 2017 13:57:56 +1300 > Kalyan Kinthada wrote: > >> When the arbitration between NOR and NAND flash is enabled >> the field bit[21] in the Data Flash Control Register >> needs to be set to 1 according to guidlein

Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-14 Thread Boris Brezillon
Hi Kalyan, On Thu, 28 Sep 2017 13:57:56 +1300 Kalyan Kinthada wrote: > When the arbitration between NOR and NAND flash is enabled > the field bit[21] in the Data Flash Control Register > needs to be set to 1 according to guidleine GL-5830741 mentioned > in Marvell Errata document MV-S501377-00,

Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-10 Thread Kalyan Kinthada
Hello Miquel, On 09/10/17 19:18, Miquel RAYNAL wrote: > Hello Kalyan, > > On Mon, 9 Oct 2017 02:31:30 + > Kalyan Kinthada wrote: > >> On 05/10/17 20:41, Miquel RAYNAL wrote: >>> Hello Kalyan, >>> >>> On Thu, 28 Sep 2017 13:57:56 +1300 >>> Kalyan Kinthada wrote: >>> When the arbitratio

Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-08 Thread Miquel RAYNAL
Hello Kalyan, On Mon, 9 Oct 2017 02:31:30 + Kalyan Kinthada wrote: > On 05/10/17 20:41, Miquel RAYNAL wrote: > > Hello Kalyan, > > > > On Thu, 28 Sep 2017 13:57:56 +1300 > > Kalyan Kinthada wrote: > > > >> When the arbitration between NOR and NAND flash is enabled > >> the field bit[21]

Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-08 Thread Kalyan Kinthada
On 05/10/17 20:41, Miquel RAYNAL wrote: > Hello Kalyan, > > On Thu, 28 Sep 2017 13:57:56 +1300 > Kalyan Kinthada wrote: > >> When the arbitration between NOR and NAND flash is enabled >> the field bit[21] in the Data Flash Control Register >> needs to be set to 1 according to guidleine GL-5830741

Re: [PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-10-05 Thread Miquel RAYNAL
Hello Kalyan, On Thu, 28 Sep 2017 13:57:56 +1300 Kalyan Kinthada wrote: > When the arbitration between NOR and NAND flash is enabled > the field bit[21] in the Data Flash Control Register > needs to be set to 1 according to guidleine GL-5830741 mentioned Typo: guideline ^ > in Marvell Errata

[PATCH v3 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.

2017-09-27 Thread Kalyan Kinthada
When the arbitration between NOR and NAND flash is enabled the field bit[21] in the Data Flash Control Register needs to be set to 1 according to guidleine GL-5830741 mentioned in Marvell Errata document MV-S501377-00, Rev. D. This commit sets the FORCE_CSX bit to 1 for all ARMADA370 variants as