On Thu, Jun 16, 2016 at 11:22:02AM +0200, Arnd Bergmann wrote:
> On Thursday, June 16, 2016 4:01:12 PM CEST Wenrui Li wrote:
> > 在 2016/6/16 15:00, Arnd Bergmann 写道:
> > > On Thursday, June 16, 2016 9:50:21 AM CEST Shawn Lin wrote:
> > >
> > >> +reset-names = "core", "mgmt", "mgmt-sticky", "pip
Hello,
On Thu, 16 Jun 2016 11:22:02 +0200, Arnd Bergmann wrote:
> > >> +reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
> > >> +phys = <&pcie_phy>;
> > >> +phy-names = "pcie-phy";
> > >> +pinctrl-names = "default";
> > >> +pinctrl-0 = <&pcie_clkreq>;
> > >> +#interrup
On Thursday, June 16, 2016 4:01:12 PM CEST Wenrui Li wrote:
> 在 2016/6/16 15:00, Arnd Bergmann 写道:
> > On Thursday, June 16, 2016 9:50:21 AM CEST Shawn Lin wrote:
> >
> >> +reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
> >> +phys = <&pcie_phy>;
> >> +phy-names = "pcie-phy";
> >>
在 2016/6/16 15:00, Arnd Bergmann 写道:
On Thursday, June 16, 2016 9:50:21 AM CEST Shawn Lin wrote:
+ reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_clkreq>;
+
On Thursday, June 16, 2016 9:50:21 AM CEST Shawn Lin wrote:
> + reset-names = "core", "mgmt", "mgmt-sticky", "pipe";
> + phys = <&pcie_phy>;
> + phy-names = "pcie-phy";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_clkreq>;
> + #interrupt-cells = <1>;
> + interr
This patch adds a binding that describes the Rockchip PCIe controller
found on Rockchip SoCs PCIe interface.
Signed-off-by: Shawn Lin
---
Changes in v3:
- fix example dts code suggested by Rob and Marc
- remove driver's behaviour of regulator
Changes in v2:
- fix lots clk/reset stuff suggested
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