Hi Saravana,
On 2018-08-07 11:19, skan...@codeaurora.org wrote:
On 2018-08-02 14:00, skan...@codeaurora.org wrote:
On 2018-08-02 02:56, MyungJoo Ham wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the
Hi Saravana,
On 2018-08-07 11:19, skan...@codeaurora.org wrote:
On 2018-08-02 14:00, skan...@codeaurora.org wrote:
On 2018-08-02 02:56, MyungJoo Ham wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the
On Wed, Aug 08, 2018 at 02:18:18PM -0700, skan...@codeaurora.org wrote:
> On 2018-08-08 01:47, Sudeep Holla wrote:
> >On Tue, Aug 07, 2018 at 12:37:07PM -0700, skan...@codeaurora.org wrote:
> >>On 2018-08-07 09:41, Rob Herring wrote:
> >>>On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan
On Wed, Aug 08, 2018 at 02:18:18PM -0700, skan...@codeaurora.org wrote:
> On 2018-08-08 01:47, Sudeep Holla wrote:
> >On Tue, Aug 07, 2018 at 12:37:07PM -0700, skan...@codeaurora.org wrote:
> >>On 2018-08-07 09:41, Rob Herring wrote:
> >>>On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan
On 2018-08-08 01:47, Sudeep Holla wrote:
On Tue, Aug 07, 2018 at 12:37:07PM -0700, skan...@codeaurora.org wrote:
On 2018-08-07 09:41, Rob Herring wrote:
>On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
>>Many CPU architectures have caches that can scale independent of the
On 2018-08-08 01:47, Sudeep Holla wrote:
On Tue, Aug 07, 2018 at 12:37:07PM -0700, skan...@codeaurora.org wrote:
On 2018-08-07 09:41, Rob Herring wrote:
>On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
>>Many CPU architectures have caches that can scale independent of the
On Tue, Aug 07, 2018 at 12:37:07PM -0700, skan...@codeaurora.org wrote:
> On 2018-08-07 09:41, Rob Herring wrote:
> >On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
> >>Many CPU architectures have caches that can scale independent of the
> >>CPUs.
> >>Frequency scaling of the
On Tue, Aug 07, 2018 at 12:37:07PM -0700, skan...@codeaurora.org wrote:
> On 2018-08-07 09:41, Rob Herring wrote:
> >On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
> >>Many CPU architectures have caches that can scale independent of the
> >>CPUs.
> >>Frequency scaling of the
On 2018-08-07 09:41, Rob Herring wrote:
On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the cache is
not
a performance bottleneck that leads to
On 2018-08-07 09:41, Rob Herring wrote:
On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the cache is
not
a performance bottleneck that leads to
On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
> Many CPU architectures have caches that can scale independent of the CPUs.
> Frequency scaling of the caches is necessary to make sure the cache is not
> a performance bottleneck that leads to poor performance and power. The same
>
On Wed, Aug 01, 2018 at 05:57:41PM -0700, Saravana Kannan wrote:
> Many CPU architectures have caches that can scale independent of the CPUs.
> Frequency scaling of the caches is necessary to make sure the cache is not
> a performance bottleneck that leads to poor performance and power. The same
>
On 2018-08-02 14:00, skan...@codeaurora.org wrote:
On 2018-08-02 02:56, MyungJoo Ham wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the cache
is not
a performance bottleneck that leads to poor
On 2018-08-02 14:00, skan...@codeaurora.org wrote:
On 2018-08-02 02:56, MyungJoo Ham wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the cache
is not
a performance bottleneck that leads to poor
On 2018-08-02 02:56, MyungJoo Ham wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the cache is
not
a performance bottleneck that leads to poor performance and power. The
same
idea applies for RAM/DDR.
On 2018-08-02 02:56, MyungJoo Ham wrote:
Many CPU architectures have caches that can scale independent of the
CPUs.
Frequency scaling of the caches is necessary to make sure the cache is
not
a performance bottleneck that leads to poor performance and power. The
same
idea applies for RAM/DDR.
>Many CPU architectures have caches that can scale independent of the CPUs.
>Frequency scaling of the caches is necessary to make sure the cache is not
>a performance bottleneck that leads to poor performance and power. The same
>idea applies for RAM/DDR.
>
>To achieve this, this patch adds a
>Many CPU architectures have caches that can scale independent of the CPUs.
>Frequency scaling of the caches is necessary to make sure the cache is not
>a performance bottleneck that leads to poor performance and power. The same
>idea applies for RAM/DDR.
>
>To achieve this, this patch adds a
Many CPU architectures have caches that can scale independent of the CPUs.
Frequency scaling of the caches is necessary to make sure the cache is not
a performance bottleneck that leads to poor performance and power. The same
idea applies for RAM/DDR.
To achieve this, this patch adds a generic
Many CPU architectures have caches that can scale independent of the CPUs.
Frequency scaling of the caches is necessary to make sure the cache is not
a performance bottleneck that leads to poor performance and power. The same
idea applies for RAM/DDR.
To achieve this, this patch adds a generic
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