Re: [PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

2016-12-05 Thread Gautham R Shenoy
Hi Balbir, On Tue, Nov 29, 2016 at 09:42:20PM +1100, Balbir Singh wrote: > > > On 10/11/16 18:54, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" > > > > Currently all the low-power idle states are expected to wake up > > at reset vector 0x100. Which is why the

Re: [PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

2016-12-05 Thread Gautham R Shenoy
Hi Balbir, On Tue, Nov 29, 2016 at 09:42:20PM +1100, Balbir Singh wrote: > > > On 10/11/16 18:54, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" > > > > Currently all the low-power idle states are expected to wake up > > at reset vector 0x100. Which is why the macro

Re: [PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

2016-11-29 Thread Balbir Singh
On 10/11/16 18:54, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > Currently all the low-power idle states are expected to wake up > at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ > that puts the CPU to an idle state and never returns. > >

Re: [PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

2016-11-29 Thread Balbir Singh
On 10/11/16 18:54, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > Currently all the low-power idle states are expected to wake up > at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ > that puts the CPU to an idle state and never returns. > > On ISA_300, when the ESL

[PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

2016-11-09 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in the PSSCR are zero,

[PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

2016-11-09 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in the PSSCR are zero, the CPU is expected to