A GPIO might be used to reset the PCI IP. Describe the property needed
in this case.
Signed-off-by: Miquel Raynal <miquel.ray...@bootlin.com>
Reviewed-by: Rob Herring <r...@kernel.org>
---
Documentation/devicetree/bindings/pci/aardvark-pci.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt
b/Documentation/devicetree/bindings/pci/aardvark-pci.txt
index 8b7f048705ec..b47d6d608ae1 100644
--- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt
+++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt
@@ -27,6 +27,8 @@ The following are optional properties:
- pinctrl-names: must be "default".
- pinctrl-0: pin control group to be used to mux the PCIe endpoint card
reset line so that it will be automatically driven by the PCIe IP.
+ - reset-gpios: GPIO to reset the device (alternative to the above
+ entries that represent a pin controlled by the PCI IP itself).
In addition, the Device Tree describing an Aardvark PCIe controller
must include a sub-node that describes the legacy interrupt controller
--
2.19.1
