Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-07-04 Thread Duc Dang
On Mon, Jun 6, 2016 at 10:56 AM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-07-04 Thread Duc Dang
On Mon, Jun 6, 2016 at 10:56 AM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-11 Thread Marc Zyngier
On Fri, 10 Jun 2016 10:32:24 -0700 David Daney wrote: > On 06/10/2016 09:56 AM, Marc Zyngier wrote: > > On 10/06/16 17:50, David Daney wrote: > >> On 06/10/2016 12:23 AM, Marc Zyngier wrote: > >>> On Thu, 09 Jun 2016 14:06:02 -0700 > >>> David Daney

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-11 Thread Marc Zyngier
On Fri, 10 Jun 2016 10:32:24 -0700 David Daney wrote: > On 06/10/2016 09:56 AM, Marc Zyngier wrote: > > On 10/06/16 17:50, David Daney wrote: > >> On 06/10/2016 12:23 AM, Marc Zyngier wrote: > >>> On Thu, 09 Jun 2016 14:06:02 -0700 > >>> David Daney wrote: > >>> > I spoke too soon... >

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread Duc Dang
On Mon, Jun 6, 2016 at 10:56 AM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread Duc Dang
On Mon, Jun 6, 2016 at 10:56 AM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread David Daney
On 06/10/2016 09:56 AM, Marc Zyngier wrote: On 10/06/16 17:50, David Daney wrote: On 06/10/2016 12:23 AM, Marc Zyngier wrote: On Thu, 09 Jun 2016 14:06:02 -0700 David Daney wrote: I spoke too soon... On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM,

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread David Daney
On 06/10/2016 09:56 AM, Marc Zyngier wrote: On 10/06/16 17:50, David Daney wrote: On 06/10/2016 12:23 AM, Marc Zyngier wrote: On Thu, 09 Jun 2016 14:06:02 -0700 David Daney wrote: I spoke too soon... On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote:

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread Marc Zyngier
On 10/06/16 17:50, David Daney wrote: > On 06/10/2016 12:23 AM, Marc Zyngier wrote: >> On Thu, 09 Jun 2016 14:06:02 -0700 >> David Daney wrote: >> >>> I spoke too soon... >>> >>> On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote:

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread Marc Zyngier
On 10/06/16 17:50, David Daney wrote: > On 06/10/2016 12:23 AM, Marc Zyngier wrote: >> On Thu, 09 Jun 2016 14:06:02 -0700 >> David Daney wrote: >> >>> I spoke too soon... >>> >>> On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote: > The ARM architected

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread David Daney
On 06/10/2016 12:23 AM, Marc Zyngier wrote: On Thu, 09 Jun 2016 14:06:02 -0700 David Daney wrote: I spoke too soon... On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote: The ARM architected timer specification mandates that the

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread David Daney
On 06/10/2016 12:23 AM, Marc Zyngier wrote: On Thu, 09 Jun 2016 14:06:02 -0700 David Daney wrote: I spoke too soon... On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote: The ARM architected timer specification mandates that the interrupt associated with

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread Marc Zyngier
On Thu, 09 Jun 2016 14:06:02 -0700 David Daney wrote: > I spoke too soon... > > On 06/09/2016 11:11 AM, David Daney wrote: > > On 06/06/2016 10:56 AM, Marc Zyngier wrote: > >> The ARM architected timer specification mandates that the interrupt > >> associated with each

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-10 Thread Marc Zyngier
On Thu, 09 Jun 2016 14:06:02 -0700 David Daney wrote: > I spoke too soon... > > On 06/09/2016 11:11 AM, David Daney wrote: > > On 06/06/2016 10:56 AM, Marc Zyngier wrote: > >> The ARM architected timer specification mandates that the interrupt > >> associated with each timer is level triggered

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread David Daney
I spoke too soon... On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote: The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread David Daney
I spoke too soon... On 06/09/2016 11:11 AM, David Daney wrote: On 06/06/2016 10:56 AM, Marc Zyngier wrote: The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread David Daney
On 06/06/2016 10:56 AM, Marc Zyngier wrote: The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread David Daney
On 06/06/2016 10:56 AM, Marc Zyngier wrote: The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread Dinh Nguyen
On 06/06/2016 12:56 PM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread Dinh Nguyen
On 06/06/2016 12:56 PM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread Carlo Caione
On 06/06/16 18:56, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the interrupt >

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-09 Thread Carlo Caione
On 06/06/16 18:56, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the interrupt >

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-07 Thread Michal Simek
On 6.6.2016 19:56, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the interrupt >

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-07 Thread Michal Simek
On 6.6.2016 19:56, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the interrupt >

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-07 Thread Krzysztof Kozlowski
On 06/06/2016 07:56 PM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the

Re: [PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-07 Thread Krzysztof Kozlowski
On 06/06/2016 07:56 PM, Marc Zyngier wrote: > The ARM architected timer specification mandates that the interrupt > associated with each timer is level triggered (which corresponds to > the "counter >= comparator" condition). > > A number of DTs are being remarkably creative, declaring the

[PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-06 Thread Marc Zyngier
The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for

[PATCH v3 2/2] arm64: dts: Fix broken architected timer interrupt trigger

2016-06-06 Thread Marc Zyngier
The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for