Re: [PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

2016-08-15 Thread Frank Wang
Hi Heiko, On 2016/8/8 17:55, Frank Wang wrote: Hi Heiko, On 2016/8/6 0:05, Heiko Stübner wrote: Hi Frank, Am Freitag, 5. August 2016, 16:34:42 schrieb Frank Wang: On 2016/8/5 3:10, Heiko Stübner wrote: Am Dienstag, 2. August 2016, 15:19:56 schrieb Xing Zheng: Export these source clocks for

Re: [PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

2016-08-08 Thread Frank Wang
Hi Heiko, On 2016/8/6 0:05, Heiko Stübner wrote: Hi Frank, Am Freitag, 5. August 2016, 16:34:42 schrieb Frank Wang: On 2016/8/5 3:10, Heiko Stübner wrote: Am Dienstag, 2. August 2016, 15:19:56 schrieb Xing Zheng: Export these source clocks for usbphy. Signed-off-by: Xing Zheng can you ple

Re: [PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

2016-08-05 Thread Heiko Stübner
Hi Frank, Am Freitag, 5. August 2016, 16:34:42 schrieb Frank Wang: > On 2016/8/5 3:10, Heiko Stübner wrote: > > Am Dienstag, 2. August 2016, 15:19:56 schrieb Xing Zheng: > >> Export these source clocks for usbphy. > >> > >> Signed-off-by: Xing Zheng > > > > can you please provide a rationale wh

Re: [PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

2016-08-05 Thread Frank Wang
Hi Heiko, On 2016/8/5 3:10, Heiko Stübner wrote: Hi Xing, Am Dienstag, 2. August 2016, 15:19:56 schrieb Xing Zheng: Export these source clocks for usbphy. Signed-off-by: Xing Zheng can you please provide a rationale why you need manual control over that intermediate clock? Well, From belo

Re: [PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

2016-08-04 Thread Heiko Stübner
Hi Xing, Am Dienstag, 2. August 2016, 15:19:56 schrieb Xing Zheng: > Export these source clocks for usbphy. > > Signed-off-by: Xing Zheng can you please provide a rationale why you need manual control over that intermediate clock? The two usbphys seem to use the clk_usb2phyX_ref clocks, gene

[PATCH v3 2/7] clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1

2016-08-02 Thread Xing Zheng
Export these source clocks for usbphy. Signed-off-by: Xing Zheng --- Changes in v3: None Changes in v2: None drivers/clk/rockchip/clk-rk3399.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c inde