There are several reports of freeze on enabling HWP (Hardware PStates)
feature on Skylake based systems by Intel P states driver. The root
cause is identified as the HWP interrupts causing BIOS code to freeze.
HWP interrupts uses thermal LVT.
Linux natively handles thermal interrupts, but in
There are several reports of freeze on enabling HWP (Hardware PStates)
feature on Skylake based systems by Intel P states driver. The root
cause is identified as the HWP interrupts causing BIOS code to freeze.
HWP interrupts uses thermal LVT.
Linux natively handles thermal interrupts, but in
On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
> There are several reports of freeze on enabling HWP (Hardware PStates)
> feature on Skylake based systems by Intel P states driver. The root
> cause is identified as the HWP interrupts causing BIOS code to freeze.
> HWP interrupts uses thermal
On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
> There are several reports of freeze on enabling HWP (Hardware PStates)
> feature on Skylake based systems by Intel P states driver. The root
> cause is identified as the HWP interrupts causing BIOS code to freeze.
> HWP interrupts uses thermal
On Thu, 2016-03-17 at 16:03 -0400, Linda Knippers wrote:
> On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
> >
> > There are several reports of freeze on enabling HWP (Hardware
> > PStates)
> > feature on Skylake based systems by Intel P states driver. The root
> > cause is identified as the HWP
On Thu, 2016-03-17 at 16:03 -0400, Linda Knippers wrote:
> On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
> >
> > There are several reports of freeze on enabling HWP (Hardware
> > PStates)
> > feature on Skylake based systems by Intel P states driver. The root
> > cause is identified as the HWP
On 3/17/2016 4:36 PM, Srinivas Pandruvada wrote:
> On Thu, 2016-03-17 at 16:03 -0400, Linda Knippers wrote:
>> On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
>>>
>>> There are several reports of freeze on enabling HWP (Hardware
>>> PStates)
>>> feature on Skylake based systems by Intel P
On 3/17/2016 4:36 PM, Srinivas Pandruvada wrote:
> On Thu, 2016-03-17 at 16:03 -0400, Linda Knippers wrote:
>> On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
>>>
>>> There are several reports of freeze on enabling HWP (Hardware
>>> PStates)
>>> feature on Skylake based systems by Intel P
On Thursday, March 17, 2016 07:44:47 PM Linda Knippers wrote:
>
> On 3/17/2016 5:12 PM, Srinivas Pandruvada wrote:
>
> > This needs to be done
> > before SMM code path looks for _OSC capabilities. The bit 12 of
> > _OSC in processor scope defines whether OS will handle thermal
>
On Thursday, March 17, 2016 07:44:47 PM Linda Knippers wrote:
>
> On 3/17/2016 5:12 PM, Srinivas Pandruvada wrote:
>
> > This needs to be done
> > before SMM code path looks for _OSC capabilities. The bit 12 of
> > _OSC in processor scope defines whether OS will handle thermal
>
On 3/17/2016 5:12 PM, Srinivas Pandruvada wrote:
> This needs to be done
> before SMM code path looks for _OSC capabilities. The bit 12 of
> _OSC in processor scope defines whether OS will handle thermal
> interrupts.
> When bit 12 is set to 1, OS will handle thermal
On 3/17/2016 5:12 PM, Srinivas Pandruvada wrote:
> This needs to be done
> before SMM code path looks for _OSC capabilities. The bit 12 of
> _OSC in processor scope defines whether OS will handle thermal
> interrupts.
> When bit 12 is set to 1, OS will handle thermal
On Thu, 2016-03-17 at 16:51 -0400, Linda Knippers wrote:
>
> On 3/17/2016 4:36 PM, Srinivas Pandruvada wrote:
> >
> > On Thu, 2016-03-17 at 16:03 -0400, Linda Knippers wrote:
> > >
> > > On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
> > > >
> > > >
> > > > There are several reports of
On Thu, 2016-03-17 at 16:51 -0400, Linda Knippers wrote:
>
> On 3/17/2016 4:36 PM, Srinivas Pandruvada wrote:
> >
> > On Thu, 2016-03-17 at 16:03 -0400, Linda Knippers wrote:
> > >
> > > On 3/17/2016 2:24 PM, Srinivas Pandruvada wrote:
> > > >
> > > >
> > > > There are several reports of
On 3/17/2016 8:17 PM, Rafael J. Wysocki wrote:
>>> This change introduces a new function
>>> acpi_early_processor_set_osc(),
>>> which walks acpi name space and finds acpi processor object and
>>> set capability via _OSC method to take over thermal LVT.
>> Does this change
On 3/17/2016 8:17 PM, Rafael J. Wysocki wrote:
>>> This change introduces a new function
>>> acpi_early_processor_set_osc(),
>>> which walks acpi name space and finds acpi processor object and
>>> set capability via _OSC method to take over thermal LVT.
>> Does this change
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