Hi Cyrille
Thanks for your comments. I am sending v5 with all of them (hopefully) fixed.
On Fri, Sep 16, 2016 at 6:33 PM, Cyrille Pitchen
wrote:
>> + else {
>> + uint64_t aux = to;
> what about i ?
do_div explicitly requires uint64_t on
Hi Cyrille
Thanks for your comments. I am sending v5 with all of them (hopefully) fixed.
On Fri, Sep 16, 2016 at 6:33 PM, Cyrille Pitchen
wrote:
>> + else {
>> + uint64_t aux = to;
> what about i ?
do_div explicitly requires uint64_t on some arches, I got some
Hi Ricardo,
Le 14/07/2016 à 22:18, Ricardo Ribalda Delgado a écrit :
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard. With
> the following
Hi Ricardo,
Le 14/07/2016 à 22:18, Ricardo Ribalda Delgado a écrit :
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard. With
> the following
This is the monthly ping :)
Anything I can do help to merge this?
Regards!
On Wed, Aug 10, 2016 at 11:12 AM, Ricardo Ribalda Delgado
wrote:
> ping?
>
> On Thu, Jul 14, 2016 at 10:18 PM, Ricardo Ribalda Delgado
> wrote:
>> Xilinx
This is the monthly ping :)
Anything I can do help to merge this?
Regards!
On Wed, Aug 10, 2016 at 11:12 AM, Ricardo Ribalda Delgado
wrote:
> ping?
>
> On Thu, Jul 14, 2016 at 10:18 PM, Ricardo Ribalda Delgado
> wrote:
>> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
>>
ping?
On Thu, Jul 14, 2016 at 10:18 PM, Ricardo Ribalda Delgado
wrote:
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard.
ping?
On Thu, Jul 14, 2016 at 10:18 PM, Ricardo Ribalda Delgado
wrote:
> Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
> their configuration data and (optionally) some user data.
>
> The protocol of this flash follows most of the spi-nor standard. With
> the following
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.
The protocol of this flash follows most of the spi-nor standard. With
the following differences:
- Page size might not be a power of two.
- The address calculation
Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.
The protocol of this flash follows most of the spi-nor standard. With
the following differences:
- Page size might not be a power of two.
- The address calculation
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