On 07/27/2016 11:12 AM, Christoph Lameter wrote:
On Mon, 25 Jul 2016, Tejun Heo wrote:
I don't get it. What's the harm of using percpu memory here? Other
percpu data structures have remote access too. They're to a lower
degree but I don't see a clear demarcation line and making addtions
On 07/27/2016 11:12 AM, Christoph Lameter wrote:
On Mon, 25 Jul 2016, Tejun Heo wrote:
I don't get it. What's the harm of using percpu memory here? Other
percpu data structures have remote access too. They're to a lower
degree but I don't see a clear demarcation line and making addtions
On Mon, 25 Jul 2016, Tejun Heo wrote:
> I don't get it. What's the harm of using percpu memory here? Other
> percpu data structures have remote access too. They're to a lower
> degree but I don't see a clear demarcation line and making addtions
> per-cpu seems to have significant benefits
On Mon, 25 Jul 2016, Tejun Heo wrote:
> I don't get it. What's the harm of using percpu memory here? Other
> percpu data structures have remote access too. They're to a lower
> degree but I don't see a clear demarcation line and making addtions
> per-cpu seems to have significant benefits
Hello, Christoph.
On Mon, Jul 25, 2016 at 08:48:25AM -0500, Christoph Lameter wrote:
> On Fri, 22 Jul 2016, Waiman Long wrote:
>
> > - Add a new patch to make the percpu head structure cacheline aligned
> >to prevent cacheline contention from disrupting the performance
> >of nearby
Hello, Christoph.
On Mon, Jul 25, 2016 at 08:48:25AM -0500, Christoph Lameter wrote:
> On Fri, 22 Jul 2016, Waiman Long wrote:
>
> > - Add a new patch to make the percpu head structure cacheline aligned
> >to prevent cacheline contention from disrupting the performance
> >of nearby
On Fri, 22 Jul 2016, Waiman Long wrote:
> - Add a new patch to make the percpu head structure cacheline aligned
>to prevent cacheline contention from disrupting the performance
>of nearby percpu variables.
It would be better not to use the percpu allocation etc for this.
Given the
On Fri, 22 Jul 2016, Waiman Long wrote:
> - Add a new patch to make the percpu head structure cacheline aligned
>to prevent cacheline contention from disrupting the performance
>of nearby percpu variables.
It would be better not to use the percpu allocation etc for this.
Given the
v3->v4:
- As suggested by Al, encapsulate the dlock list mechanism into
the dlist_for_each_entry() and dlist_for_each_entry_safe()
which are the equivalent of list_for_each_entry() and
list_for_each_entry_safe() for regular linked list. That simplifies
the changes in the call sites
v3->v4:
- As suggested by Al, encapsulate the dlock list mechanism into
the dlist_for_each_entry() and dlist_for_each_entry_safe()
which are the equivalent of list_for_each_entry() and
list_for_each_entry_safe() for regular linked list. That simplifies
the changes in the call sites
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