Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-06 Thread Rhyland Klein
On 5/6/2015 9:57 AM, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote: >> On 5/4/2015 7:01 PM, Benson Leung wrote: >>> On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote: @@ -495,6 +505,28 @@ static int

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-06 Thread Thierry Reding
On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote: > On 5/4/2015 7:01 PM, Benson Leung wrote: > > On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote: > >> @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct > >> tegra_clk_pll_freq_table *cfg, > >> return 0;

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-06 Thread Thierry Reding
On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote: On 5/4/2015 7:01 PM, Benson Leung wrote: On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote: @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg,

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-06 Thread Rhyland Klein
On 5/6/2015 9:57 AM, Thierry Reding wrote: * PGP Signed by an unknown key On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote: On 5/4/2015 7:01 PM, Benson Leung wrote: On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote: @@ -495,6 +505,28 @@ static int

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-05 Thread Rhyland Klein
On 5/4/2015 7:01 PM, Benson Leung wrote: > On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote: >> @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct >> tegra_clk_pll_freq_table *cfg, >> return 0; >> } >> >> +static void clk_pll_set_sdm_data(struct clk_hw *hw, >> +

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-05 Thread Rhyland Klein
On 5/4/2015 7:01 PM, Benson Leung wrote: On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote: @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, return 0; } +static void clk_pll_set_sdm_data(struct clk_hw *hw, +

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-04 Thread Benson Leung
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote: > @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct > tegra_clk_pll_freq_table *cfg, > return 0; > } > > +static void clk_pll_set_sdm_data(struct clk_hw *hw, > +struct

[PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-04 Thread Rhyland Klein
This adds logic for taking SDM_DIN (Sigma Delta Modulator) setting into the equation to calculate the effective N value for PLL which supports fractional divider. The effective N = NDIV + 1/2 + SDM_DIN/2^13, where NDIV is the integer feedback divider. Signed-off-by: Rhyland Klein ---

[PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-04 Thread Rhyland Klein
This adds logic for taking SDM_DIN (Sigma Delta Modulator) setting into the equation to calculate the effective N value for PLL which supports fractional divider. The effective N = NDIV + 1/2 + SDM_DIN/2^13, where NDIV is the integer feedback divider. Signed-off-by: Rhyland Klein

Re: [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data

2015-05-04 Thread Benson Leung
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote: @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, return 0; } +static void clk_pll_set_sdm_data(struct clk_hw *hw, +struct