On 5/6/2015 9:57 AM, Thierry Reding wrote:
> * PGP Signed by an unknown key
>
> On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote:
>> On 5/4/2015 7:01 PM, Benson Leung wrote:
>>> On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote:
@@ -495,6 +505,28 @@ static int
On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote:
> On 5/4/2015 7:01 PM, Benson Leung wrote:
> > On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote:
> >> @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct
> >> tegra_clk_pll_freq_table *cfg,
> >> return 0;
On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote:
On 5/4/2015 7:01 PM, Benson Leung wrote:
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote:
@@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct
tegra_clk_pll_freq_table *cfg,
On 5/6/2015 9:57 AM, Thierry Reding wrote:
* PGP Signed by an unknown key
On Tue, May 05, 2015 at 03:16:08PM -0400, Rhyland Klein wrote:
On 5/4/2015 7:01 PM, Benson Leung wrote:
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote:
@@ -495,6 +505,28 @@ static int
On 5/4/2015 7:01 PM, Benson Leung wrote:
> On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote:
>> @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct
>> tegra_clk_pll_freq_table *cfg,
>> return 0;
>> }
>>
>> +static void clk_pll_set_sdm_data(struct clk_hw *hw,
>> +
On 5/4/2015 7:01 PM, Benson Leung wrote:
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote:
@@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct
tegra_clk_pll_freq_table *cfg,
return 0;
}
+static void clk_pll_set_sdm_data(struct clk_hw *hw,
+
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein wrote:
> @@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct
> tegra_clk_pll_freq_table *cfg,
> return 0;
> }
>
> +static void clk_pll_set_sdm_data(struct clk_hw *hw,
> +struct
This adds logic for taking SDM_DIN (Sigma Delta Modulator) setting into
the equation to calculate the effective N value for PLL which supports
fractional divider.
The effective N = NDIV + 1/2 + SDM_DIN/2^13, where NDIV is the integer
feedback divider.
Signed-off-by: Rhyland Klein
---
This adds logic for taking SDM_DIN (Sigma Delta Modulator) setting into
the equation to calculate the effective N value for PLL which supports
fractional divider.
The effective N = NDIV + 1/2 + SDM_DIN/2^13, where NDIV is the integer
feedback divider.
Signed-off-by: Rhyland Klein
On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein rkl...@nvidia.com wrote:
@@ -495,6 +505,28 @@ static int _calc_rate(struct clk_hw *hw, struct
tegra_clk_pll_freq_table *cfg,
return 0;
}
+static void clk_pll_set_sdm_data(struct clk_hw *hw,
+struct
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