On Wed, Jul 27, 2016 at 07:01:24PM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 06:31:52PM +0100, Mark Rutland wrote:
> > IIUC, that means you *could* implement per-irq masking by having the
> > CPU's mask value set to 0, and flipping the priority of an IRQ between 0
> > and 1 to disable/en
On Wed, Jul 27, 2016 at 06:31:52PM +0100, Mark Rutland wrote:
> > > > It's looping over possible cpus (per the kernel configuration for max
> > > > cpus) so it's expected that a system with fewer cpus will also have
> > > > fewer reg ranges for the aic. This is not an error. If you think
> > > > th
On Wed, Jul 27, 2016 at 01:07:09PM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 02:22:52PM +0100, Mark Rutland wrote:
> > On Wed, Jul 27, 2016 at 09:06:06AM -0400, Rich Felker wrote:
> > > On Wed, Jul 27, 2016 at 11:12:36AM +0100, Mark Rutland wrote:
> > > > On Wed, Jul 27, 2016 at 05:35:09A
On Wed, Jul 27, 2016 at 02:27:54PM +0100, Mark Rutland wrote:
> On Wed, Jul 27, 2016 at 09:08:21AM -0400, Rich Felker wrote:
> > On Wed, Jul 27, 2016 at 11:15:38AM +0100, Mark Rutland wrote:
> > > On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> > > > For simplicity, there is no aic1-
On Wed, Jul 27, 2016 at 02:22:52PM +0100, Mark Rutland wrote:
> On Wed, Jul 27, 2016 at 09:06:06AM -0400, Rich Felker wrote:
> > On Wed, Jul 27, 2016 at 11:12:36AM +0100, Mark Rutland wrote:
> > > On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> > > > +int __init aic_irq_of_init(struc
On Wed, Jul 27, 2016 at 09:08:21AM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 11:15:38AM +0100, Mark Rutland wrote:
> > On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> > > For simplicity, there is no aic1-specific logic in the driver beyond
> > > setting the priority registe
On Wed, Jul 27, 2016 at 09:06:06AM -0400, Rich Felker wrote:
> On Wed, Jul 27, 2016 at 11:12:36AM +0100, Mark Rutland wrote:
> > On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> > > +int __init aic_irq_of_init(struct device_node *node, struct device_node
> > > *parent)
> > > +{
> > >
On Wed, Jul 27, 2016 at 11:15:38AM +0100, Mark Rutland wrote:
> On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> > For simplicity, there is no aic1-specific logic in the driver beyond
> > setting the priority register, which is necessary for interrupts to
> > work at all. Eventually a
On Wed, Jul 27, 2016 at 11:12:36AM +0100, Mark Rutland wrote:
> On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> > +int __init aic_irq_of_init(struct device_node *node, struct device_node
> > *parent)
> > +{
> > + struct aic_data *aic = &aic_data;
> > + unsigned min_irq = 64;
> >
On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> For simplicity, there is no aic1-specific logic in the driver beyond
> setting the priority register, which is necessary for interrupts to
> work at all. Eventually aic1 will likely be phased out, but it's
> currently in use in deployme
On Wed, Jul 27, 2016 at 05:35:09AM +, Rich Felker wrote:
> +int __init aic_irq_of_init(struct device_node *node, struct device_node
> *parent)
> +{
> + struct aic_data *aic = &aic_data;
> + unsigned min_irq = 64;
> +
> + pr_info("Initializing J-Core AIC\n");
> +
> + if (!of_dev
There are two versions of the J-Core interrupt controller in use, aic1
which generates interrupts with programmable priorities, but only
supports 8 irq lines and maps them to cpu traps in the range 17 to 24,
and aic2 which uses traps in the range 64-127 and supports up to 128
irqs, with priorities
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