Re: [PATCH v4 5/6] drm/i915/skl: Update plane watermarks atomically during plane updates

2016-07-28 Thread Matt Roper
On Tue, Jul 26, 2016 at 01:34:41PM -0400, Lyude wrote: > Thanks to Ville for suggesting this as a potential solution to pipe > underruns on Skylake. > > On Skylake all of the registers for configuring planes, including the > registers for configuring their watermarks, are double buffered. New > va

[PATCH v4 5/6] drm/i915/skl: Update plane watermarks atomically during plane updates

2016-07-26 Thread Lyude
Thanks to Ville for suggesting this as a potential solution to pipe underruns on Skylake. On Skylake all of the registers for configuring planes, including the registers for configuring their watermarks, are double buffered. New values written to them won't take effect until said registers are "ar