Hello Vladimir,
>>[snip]
>> -static struct s5p_aes_dev *s5p_dev;
>> +enum hash_op {
>> +HASH_OP_UPDATE = 1,
>> +HASH_OP_FINAL = 2
>> +};
>
> If this type is not going to be extended, then I'd rather suggest to
> use a boolean correspondent field in the struct s5p_hash_reqctx instead
>
Hello Vladimir,
>>[snip]
>> -static struct s5p_aes_dev *s5p_dev;
>> +enum hash_op {
>> +HASH_OP_UPDATE = 1,
>> +HASH_OP_FINAL = 2
>> +};
>
> If this type is not going to be extended, then I'd rather suggest to
> use a boolean correspondent field in the struct s5p_hash_reqctx instead
>
Hello Vladimir,
thank you for review. I will apply most of your suggestions,
in a few places it is not possible, see comments below.
Your review helped me to improve two functions.
On 12.10.2017 13:45, Vladimir Zapolskiy wrote:
> Hello Kamil,
>
> thank you for the change, please find below a
Hello Vladimir,
thank you for review. I will apply most of your suggestions,
in a few places it is not possible, see comments below.
Your review helped me to improve two functions.
On 12.10.2017 13:45, Vladimir Zapolskiy wrote:
> Hello Kamil,
>
> thank you for the change, please find below a
Hello Kamil,
thank you for the change, please find below a number of minor
review comments.
On 10/09/2017 02:12 PM, Kamil Konieczny wrote:
> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
> It uses the crypto framework asynchronous hash api.
> It is based on omap-sham.c driver.
Hello Kamil,
thank you for the change, please find below a number of minor
review comments.
On 10/09/2017 02:12 PM, Kamil Konieczny wrote:
> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
> It uses the crypto framework asynchronous hash api.
> It is based on omap-sham.c driver.
On Mon, Oct 09, 2017 at 01:12:30PM +0200, Kamil Konieczny wrote:
> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
> It uses the crypto framework asynchronous hash api.
> It is based on omap-sham.c driver.
> S5P has some HW differencies and is not implemented.
>
> Modifications
On Mon, Oct 09, 2017 at 01:12:30PM +0200, Kamil Konieczny wrote:
> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
> It uses the crypto framework asynchronous hash api.
> It is based on omap-sham.c driver.
> S5P has some HW differencies and is not implemented.
>
> Modifications
Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
It uses the crypto framework asynchronous hash api.
It is based on omap-sham.c driver.
S5P has some HW differencies and is not implemented.
Modifications in s5p-sss:
- Add hash supporting structures and functions.
- Modify irq
Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
It uses the crypto framework asynchronous hash api.
It is based on omap-sham.c driver.
S5P has some HW differencies and is not implemented.
Modifications in s5p-sss:
- Add hash supporting structures and functions.
- Modify irq
10 matches
Mail list logo
