Re: [PATCH v5 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM

On Mon, Dec 21, 2020 at 01:17:31PM -0800, Sowjanya Komatineni wrote: > Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled > when using DDR interface mode. > > This patch adds clock ID for this to dt-binding. > > Acked-by: Rob Herring > Signed-off-by: Sowjanya Komatineni >

Re: [PATCH v5 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM

On Tue, Jan 26, 2021 at 11:03:42AM +0100, Thierry Reding wrote: > Since the TEGRA210_CLK_QSPI_PM symbol isn't used by the driver patches > directly, would you mind dropping this so that I can pick it up into the > Tegra tree along with the DT updates? Sure, can you send me a revert commit

[PATCH v5 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM

Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled when using DDR interface mode. This patch adds clock ID for this to dt-binding. Acked-by: Rob Herring Signed-off-by: Sowjanya Komatineni --- include/dt-bindings/clock/tegra210-car.h | 2 +- 1 file changed, 1 insertion(+), 1