d ; linux-clk
> > ; moderated list:ARM/FREESCALE IMX / MXC
> > ARM ARCHITECTURE ; Lucas Stach
> >
> > Subject: Re: [PATCH v5 10/14] clk: imx: Add generic blk-ctl driver
> >
> > Hi Abel,
> >
> > On 17.11.20 15:48, Abel Vesa wrote:
> > > On 20-
oyd ; Shawn Guo ;
> Mike Turquette ; Linux Kernel Mailing List
> ; Marek Vasut ;
> dl-linux-imx ; Sascha Hauer ;
> Fabio Estevam ; Philipp Zabel
> ; Adam Ford ; linux-clk
> ; moderated list:ARM/FREESCALE IMX / MXC
> ARM ARCHITECTURE ; Lucas Stach
>
> Subject: Re: [PATCH v5
Hi Abel,
On 17.11.20 15:48, Abel Vesa wrote:
On 20-11-11 17:13:25, Dong Aisheng wrote:
On Tue, Nov 3, 2020 at 7:22 PM Abel Vesa wrote:
...
+static int imx_blk_ctl_reset_set(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct i
On 20-11-11 17:13:25, Dong Aisheng wrote:
> On Tue, Nov 3, 2020 at 7:22 PM Abel Vesa wrote:
> ...
> > +static int imx_blk_ctl_reset_set(struct reset_controller_dev *rcdev,
> > + unsigned long id, bool assert)
> > +{
> > + struct imx_blk_ctl_drvdata *drvdata =
On Tue, Nov 3, 2020 at 7:22 PM Abel Vesa wrote:
...
> +static int imx_blk_ctl_reset_set(struct reset_controller_dev *rcdev,
> + unsigned long id, bool assert)
> +{
> + struct imx_blk_ctl_drvdata *drvdata = container_of(rcdev,
> + struct i
ng ; Jacky Bai ; Peng
> Fan ; Aisheng Dong
> Cc: dl-linux-imx ; linux-arm-ker...@lists.infradead.org;
> Linux Kernel Mailing List ;
> linux-...@vger.kernel.org; devicet...@vger.kernel.org; Abel Vesa
>
> Subject: [PATCH v5 10/14] clk: imx: Add generic blk-ctl driver
>
> The
Quoting Abel Vesa (2020-11-03 03:18:22)
> diff --git a/drivers/clk/imx/clk-blk-ctl.c b/drivers/clk/imx/clk-blk-ctl.c
> new file mode 100644
> index ..9ac0ed0
> --- /dev/null
> +++ b/drivers/clk/imx/clk-blk-ctl.c
> @@ -0,0 +1,302 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Cop
The i.MX8MP platform introduces a new type of IP which is called BLK_CTL in
RM and usually is comprised of some GPRs that are considered too
generic to be part of any dedicated IP from that specific subsystem.
In general, some of the GPRs have some clock bits, some have reset bits,
so in order to
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