On 22/02/18 09:04, Quentin Perret wrote:
> Hi Sudeep,
>
> On Monday 12 Feb 2018 at 18:45:23 (+), Sudeep Holla wrote:
> [...]
>> +/*
>> + * perf_ops->freq_set is not a synchronous, the actual OPP change will
>> + * happen asynchronously and can get notified if the events are
>> + *
On 22/02/18 09:04, Quentin Perret wrote:
> Hi Sudeep,
>
> On Monday 12 Feb 2018 at 18:45:23 (+), Sudeep Holla wrote:
> [...]
>> +/*
>> + * perf_ops->freq_set is not a synchronous, the actual OPP change will
>> + * happen asynchronously and can get notified if the events are
>> + *
Hi Sudeep,
On Monday 12 Feb 2018 at 18:45:23 (+), Sudeep Holla wrote:
[...]
> +/*
> + * perf_ops->freq_set is not a synchronous, the actual OPP change will
> + * happen asynchronously and can get notified if the events are
> + * subscribed for by the SCMI firmware
> + */
> +static int
>
Hi Sudeep,
On Monday 12 Feb 2018 at 18:45:23 (+), Sudeep Holla wrote:
[...]
> +/*
> + * perf_ops->freq_set is not a synchronous, the actual OPP change will
> + * happen asynchronously and can get notified if the events are
> + * subscribed for by the SCMI firmware
> + */
> +static int
>
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control including CPU DVFS. SCMI Message Protocol is used to
communicate with the SCP.
This patch adds a cpufreq driver for such systems using SCMI interface
to
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control including CPU DVFS. SCMI Message Protocol is used to
communicate with the SCP.
This patch adds a cpufreq driver for such systems using SCMI interface
to
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control including CPU DVFS. SCMI Message Protocol is used to
communicate with the SCP.
This patch adds a cpufreq driver for such systems using SCMI interface
to
On some ARM based systems, a separate Cortex-M based System Control
Processor(SCP) provides the overall power, clock, reset and system
control including CPU DVFS. SCMI Message Protocol is used to
communicate with the SCP.
This patch adds a cpufreq driver for such systems using SCMI interface
to
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