On 03/11, Lorenzo Pieralisi wrote:
> On Fri, Mar 07, 2014 at 11:08:56PM +, Stephen Boyd wrote:
> >
> > Or should we be expressing the L1 cache as well? Something like:
> >
> > cpus {
> > #address-cells = <1>;
> > #size-cells = <0>;
> >
> >
On Fri, Mar 07, 2014 at 11:08:56PM +, Stephen Boyd wrote:
> On 02/26, Lorenzo Pieralisi wrote:
> > On Tue, Feb 25, 2014 at 08:48:38PM +, Kumar Gala wrote:
> > >
> > > On Feb 25, 2014, at 5:16 AM, Lorenzo Pieralisi
> > > wrote:
> > > >
> > > > As I mentioned, I do not like the idea of ad
On 02/26, Lorenzo Pieralisi wrote:
> On Tue, Feb 25, 2014 at 08:48:38PM +, Kumar Gala wrote:
> >
> > On Feb 25, 2014, at 5:16 AM, Lorenzo Pieralisi
> > wrote:
> > >
> > > As I mentioned, I do not like the idea of adding compatible properties
> > > just to force the kernel to create platform
On Tue, Feb 25, 2014 at 08:48:38PM +, Kumar Gala wrote:
>
> On Feb 25, 2014, at 5:16 AM, Lorenzo Pieralisi
> wrote:
>
> > Hi Stephen,
> >
> > On Wed, Feb 19, 2014 at 12:20:43AM +, Stephen Boyd wrote:
> >> (Sorry, this discussion stalled due to merge window + life events)
> >
> > Sorry
On Feb 25, 2014, at 5:16 AM, Lorenzo Pieralisi
wrote:
> Hi Stephen,
>
> On Wed, Feb 19, 2014 at 12:20:43AM +, Stephen Boyd wrote:
>> (Sorry, this discussion stalled due to merge window + life events)
>
> Sorry for the delay in replying on my side too.
>
>> On 01/17, Lorenzo Pieralisi wro
Hi Stephen,
On Wed, Feb 19, 2014 at 12:20:43AM +, Stephen Boyd wrote:
> (Sorry, this discussion stalled due to merge window + life events)
Sorry for the delay in replying on my side too.
> On 01/17, Lorenzo Pieralisi wrote:
> > On Thu, Jan 16, 2014 at 07:26:17PM +, Stephen Boyd wrote:
>
(Sorry, this discussion stalled due to merge window + life events)
On 01/17, Lorenzo Pieralisi wrote:
> On Thu, Jan 16, 2014 at 07:26:17PM +, Stephen Boyd wrote:
> > On 01/16, Lorenzo Pieralisi wrote:
> > > On Thu, Jan 16, 2014 at 06:05:05PM +, Stephen Boyd wrote:
> > > > On 01/16, Lorenzo
On Thu, Jan 16, 2014 at 07:26:17PM +, Stephen Boyd wrote:
> On 01/16, Lorenzo Pieralisi wrote:
> > On Thu, Jan 16, 2014 at 06:05:05PM +, Stephen Boyd wrote:
> > > On 01/16, Lorenzo Pieralisi wrote:
> > > > Do we really want to do that ? I am not sure. A cpus node is supposed to
> > > > be a
On 01/16, Lorenzo Pieralisi wrote:
> On Thu, Jan 16, 2014 at 06:05:05PM +, Stephen Boyd wrote:
> > On 01/16, Lorenzo Pieralisi wrote:
> > > Do we really want to do that ? I am not sure. A cpus node is supposed to
> > > be a container node, we should not define this binding just because we
> > >
On Thu, Jan 16, 2014 at 06:05:05PM +, Stephen Boyd wrote:
> On 01/16, Lorenzo Pieralisi wrote:
> > On Thu, Jan 16, 2014 at 01:38:40AM +, Stephen Boyd wrote:
> > > On 01/15, Stephen Boyd wrote:
> > > >
> > > > Ah sorry, I forgot to put the compatible property here like in
> > > > the dts ch
On 01/16, Lorenzo Pieralisi wrote:
> On Thu, Jan 16, 2014 at 01:38:40AM +, Stephen Boyd wrote:
> > On 01/15, Stephen Boyd wrote:
> > >
> > > Ah sorry, I forgot to put the compatible property here like in
> > > the dts change. I'll do that in the next revision. Yes we need a
> > > compatible pr
On Thu, Jan 16, 2014 at 01:38:40AM +, Stephen Boyd wrote:
> On 01/15, Stephen Boyd wrote:
> >
> > Ah sorry, I forgot to put the compatible property here like in
> > the dts change. I'll do that in the next revision. Yes we need a
> > compatible property here to match the platform driver.
> >
On 01/15, Stephen Boyd wrote:
>
> Ah sorry, I forgot to put the compatible property here like in
> the dts change. I'll do that in the next revision. Yes we need a
> compatible property here to match the platform driver.
>
This is the replacement patch
-8<--
From: Stephen Boyd
Subject:
On 01/15, Lorenzo Pieralisi wrote:
> On Tue, Jan 14, 2014 at 09:30:32PM +, Stephen Boyd wrote:
> > The Krait CPU/L1 error reporting device is made up a per-CPU
> > interrupt. While we're here, document the next-level-cache
> > property that's used by the Krait EDAC driver.
> >
> > Cc: Lorenzo
On Tue, Jan 14, 2014 at 09:30:32PM +, Stephen Boyd wrote:
> The Krait CPU/L1 error reporting device is made up a per-CPU
> interrupt. While we're here, document the next-level-cache
> property that's used by the Krait EDAC driver.
>
> Cc: Lorenzo Pieralisi
> Cc: Mark Rutland
> Cc: Kumar Gala
The Krait CPU/L1 error reporting device is made up a per-CPU
interrupt. While we're here, document the next-level-cache
property that's used by the Krait EDAC driver.
Cc: Lorenzo Pieralisi
Cc: Mark Rutland
Cc: Kumar Gala
Cc:
Signed-off-by: Stephen Boyd
---
Documentation/devicetree/bindings/a
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