Hi,
On Thu, Apr 28, 2016 at 6:39 AM, David.Wu wrote:
> +enum rk3x_i2c_bus_speed {
> + I2C_FS_SPD,
> + I2C_HS_SPD
> +};
> +
> +struct rk3x_i2c;
>
> Why do you need this forward definition? Seems like it's not
> necessary. Remove?
>
>
> I think we need a
Hi,
On Thu, Apr 28, 2016 at 6:39 AM, David.Wu wrote:
> +enum rk3x_i2c_bus_speed {
> + I2C_FS_SPD,
> + I2C_HS_SPD
> +};
> +
> +struct rk3x_i2c;
>
> Why do you need this forward definition? Seems like it's not
> necessary. Remove?
>
>
> I think we need a Master_Code state to seperate
Hi,
On Tue, Apr 19, 2016 at 6:55 AM, David Wu wrote:
> From: David Wu
>
> - new method to caculate i2c timings for rk3399:
> There was an timing issue about "repeated start" time at the I2C
> controller of version0, controller appears to drop
Hi,
On Tue, Apr 19, 2016 at 6:55 AM, David Wu wrote:
> From: David Wu
>
> - new method to caculate i2c timings for rk3399:
> There was an timing issue about "repeated start" time at the I2C
> controller of version0, controller appears to drop SDA at .875x (7/8)
> programmed clk high. On
On Tue, Apr 19, 2016 at 4:55 PM, David Wu wrote:
> From: David Wu
>
> - new method to caculate i2c timings for rk3399:
> There was an timing issue about "repeated start" time at the I2C
> controller of version0, controller appears to drop SDA at
On Tue, Apr 19, 2016 at 4:55 PM, David Wu wrote:
> From: David Wu
>
> - new method to caculate i2c timings for rk3399:
> There was an timing issue about "repeated start" time at the I2C
> controller of version0, controller appears to drop SDA at .875x (7/8)
> programmed clk high. On
From: David Wu
- new method to caculate i2c timings for rk3399:
There was an timing issue about "repeated start" time at the I2C
controller of version0, controller appears to drop SDA at .875x (7/8)
programmed clk high. On version 1 of the controller, the rule(.875x)
From: David Wu
- new method to caculate i2c timings for rk3399:
There was an timing issue about "repeated start" time at the I2C
controller of version0, controller appears to drop SDA at .875x (7/8)
programmed clk high. On version 1 of the controller, the rule(.875x)
isn't enough to meet
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