Hi Marcel,
On Mon, 2021-03-29 at 00:49 +, Marcel Ziswiler wrote:
> Hi Liu
>
> On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote:
> > On Tue, 2021-03-23 at 01:03 +, Marcel Ziswiler wrote:
> > > Hi Liu
> > >
> > > Some further discrepancy with them binding examples:
> > >
> > >
Hi Liu
On Tue, 2021-03-23 at 17:09 +0800, Liu Ying wrote:
> On Tue, 2021-03-23 at 01:03 +, Marcel Ziswiler wrote:
> > Hi Liu
> >
> > Some further discrepancy with them binding examples:
> >
> > arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format):
> >
On Tue, 2021-03-23 at 01:03 +, Marcel Ziswiler wrote:
> Hi Liu
>
> Some further discrepancy with them binding examples:
>
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format):
> /dpu@5618:reg: property has
> invalid length (8 bytes) (#address-cells == 2,
Hi Liu
Some further discrepancy with them binding examples:
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:335.9-36: Warning (reg_format):
/dpu@5618:reg: property has
invalid length (8 bytes) (#address-cells == 2, #size-cells == 2)
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:508.9-35: Warning
Hi Liu
I gave this a try however I believe I am still missing some piece as it throws
the following during compilation
of the device tree:
arch/arm64/boot/dts/freescale/imx8qxp.dtsi:333.18-439.7: ERROR
(phandle_references): /dpu@5618: Reference
to non-existent node or label "dc0_irqsteer"
Hi,
This is the v6 series to add some DRM bridge drivers support
for i.MX8qm/qxp SoCs.
The bridges may chain one by one to form display pipes to support
LVDS displays. The relevant display controller is DPU embedded in
i.MX8qm/qxp SoCs.
The DPU KMS driver can be found at:
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