[PATCH v6 05/10] iommu/mediatek: Move inv_sel_reg into the plat_data

[Chao Hao]

For mt6779, MMU_INV_SEL register's offset is changed from
0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to
use it.
In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it
before mt6779.

Cc: Yong Wu <yong...@mediatek.com>
Signed-off-by: Chao Hao <chao....@mediatek.com>
Reviewed-by: Matthias Brugger <matthias....@gmail.com>
---
 drivers/iommu/mtk_iommu.c | 9 ++++++---
 drivers/iommu/mtk_iommu.h | 1 +
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 219d7aa6f059..533b8f76f592 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -37,7 +37,7 @@
 #define REG_MMU_INVLD_START_A                  0x024
 #define REG_MMU_INVLD_END_A                    0x028
 
-#define REG_MMU_INV_SEL                                0x038
+#define REG_MMU_INV_SEL_GEN1                   0x038
 #define F_INVLD_EN0                            BIT(0)
 #define F_INVLD_EN1                            BIT(1)
 
@@ -178,7 +178,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie)
 
        for_each_m4u(data) {
                writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
-                              data->base + REG_MMU_INV_SEL);
+                              data->base + data->plat_data->inv_sel_reg);
                writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
                wmb(); /* Make sure the tlb flush all done */
        }
@@ -195,7 +195,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long 
iova, size_t size,
        for_each_m4u(data) {
                spin_lock_irqsave(&data->tlb_lock, flags);
                writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
-                              data->base + REG_MMU_INV_SEL);
+                              data->base + data->plat_data->inv_sel_reg);
 
                writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A);
                writel_relaxed(iova + size - 1,
@@ -784,18 +784,21 @@ static const struct dev_pm_ops mtk_iommu_pm_ops = {
 static const struct mtk_iommu_plat_data mt2712_data = {
        .m4u_plat     = M4U_MT2712,
        .flags        = HAS_4GB_MODE | HAS_BCLK | HAS_VLD_PA_RNG,
+       .inv_sel_reg  = REG_MMU_INV_SEL_GEN1,
        .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
 };
 
 static const struct mtk_iommu_plat_data mt8173_data = {
        .m4u_plat     = M4U_MT8173,
        .flags        = HAS_4GB_MODE | HAS_BCLK | RESET_AXI,
+       .inv_sel_reg  = REG_MMU_INV_SEL_GEN1,
        .larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */
 };
 
 static const struct mtk_iommu_plat_data mt8183_data = {
        .m4u_plat     = M4U_MT8183,
        .flags        = RESET_AXI,
+       .inv_sel_reg  = REG_MMU_INV_SEL_GEN1,
        .larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1},
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 5225a9170aaa..cf53f5e80d22 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -40,6 +40,7 @@ enum mtk_iommu_plat {
 struct mtk_iommu_plat_data {
        enum mtk_iommu_plat m4u_plat;
        u32                 flags;
+       u32                 inv_sel_reg;
        unsigned char       larbid_remap[MTK_LARB_NR_MAX];
 };
 
-- 
2.18.0