Re: [PATCH v6 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-09 Thread Xu Yilun
On Tue, Jun 09, 2020 at 05:15:34AM -0700, Tom Rix wrote: > When i say 'surprise the user' i mean the end user of the fpga.  I do not > mean the developer of the fpga.  An example of the use case.. > > An AFU to do bitcoin mining is created with a broken but undetected private > feature in 2017

Re: [PATCH v6 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-09 Thread Tom Rix
When i say 'surprise the user' i mean the end user of the fpga.  I do not mean the developer of the fpga.  An example of the use case.. An AFU to do bitcoin mining is created with a broken but undetected private feature in 2017 and starts shipping 10,000+ products/year and runs successfully

Re: [PATCH v6 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-08 Thread Xu Yilun
On Mon, Jun 08, 2020 at 05:48:22PM -0700, Tom Rix wrote: > I am not sure about the use of parse_feature_irqs. This function will parse interrupt info for private features which support interrupts. For now, 3 private features, FME error, Port error & User interrupt (for AFU), are using interrupt

Re: [PATCH v6 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-08 Thread Tom Rix
I am not sure about the use of parse_feature_irqs. If the irq parse fails, the feature fails to be created.  So an old afu feature which loaded ok in an older kernel can fail.  This could surprise the user. Below is a change that fails more gracefully.  Even if there is a problem in the parse,

[PATCH v6 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-04 Thread Xu Yilun
DFL based FPGA devices could support interrupts for different purposes, but current DFL framework only supports feature device enumeration with given MMIO resources information via common DFL headers. This patch introduces one new API dfl_fpga_enum_info_add_irq for low level bus drivers (e.g. PCIe

[PATCH v6 1/7] fpga: dfl: parse interrupt info for feature devices on enumeration

2020-06-04 Thread Xu Yilun
DFL based FPGA devices could support interrupts for different purposes, but current DFL framework only supports feature device enumeration with given MMIO resources information via common DFL headers. This patch introduces one new API dfl_fpga_enum_info_add_irq for low level bus drivers (e.g. PCIe