[PATCH v6 2/3] nvmem: sunxi-sid: add support for H3's SID controller

From: Icenowy Zheng The H3 SoC have a bigger SID controller, which has its direct read address at 0x200 position in the SID block, not 0x0. Also, H3 SID controller has some silicon bug that makes the direct read value wrong at cold boot, add code to workaround the bug. (This

[PATCH v6 2/3] nvmem: sunxi-sid: add support for H3's SID controller

From: Icenowy Zheng The H3 SoC have a bigger SID controller, which has its direct read address at 0x200 position in the SID block, not 0x0. Also, H3 SID controller has some silicon bug that makes the direct read value wrong at cold boot, add code to workaround the bug. (This bug has already