On 5/7/19 9:36 AM, Chanwoo Choi wrote:
> Hi Lukasz,
>
> On 19. 5. 7. 오전 12:11, Lukasz Luba wrote:
>> Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory
>> Controller frequencies for driver's DRAM timings.
>>
>> Signed-off-by: Lukasz Luba
>> ---
>>
Hi Lukasz,
On 19. 5. 7. 오전 12:11, Lukasz Luba wrote:
> Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory
> Controller frequencies for driver's DRAM timings.
>
> Signed-off-by: Lukasz Luba
> ---
> drivers/clk/samsung/clk-exynos5420.c | 17 -
> 1 file
Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory
Controller frequencies for driver's DRAM timings.
Signed-off-by: Lukasz Luba
---
drivers/clk/samsung/clk-exynos5420.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git
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