Am Montag, 22. August 2016, 11:36:19 schrieb Lin Huang:
> add ddrc clock setting, so we can do ddr frequency
> scaling on rk3399 platform in future.
>
> Signed-off-by: Lin Huang
applied to my clk-branch for 4.9
Thanks
Heiko
add ddrc clock setting, so we can do ddr frequency
scaling on rk3399 platform in future.
Signed-off-by: Lin Huang
---
Changes in v7:
- change SCLK_DDRC name from clk_ddrc to sclk_ddrc
Changes in v6:
- None
Changes in v5:
- fit for the ddr type
Changes in v4:
- None
Changes in v3:
- None
Chan
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