On 8/20/2018 4:21 AM, Lukas Wunner wrote:
On Fri, Aug 17, 2018 at 11:51:10PM -0700, Sinan Kaya wrote:
+static int pciehp_control_surprise_error(struct controller *ctrl, bool enable)
The return value isn't checked, so this could return void.
Sure, I can do that.
@@ -280,6 +303,9 @@
On 8/20/2018 4:21 AM, Lukas Wunner wrote:
On Fri, Aug 17, 2018 at 11:51:10PM -0700, Sinan Kaya wrote:
+static int pciehp_control_surprise_error(struct controller *ctrl, bool enable)
The return value isn't checked, so this could return void.
Sure, I can do that.
@@ -280,6 +303,9 @@
On Fri, Aug 17, 2018 at 11:51:10PM -0700, Sinan Kaya wrote:
> +static int pciehp_control_surprise_error(struct controller *ctrl, bool
> enable)
The return value isn't checked, so this could return void.
> @@ -280,6 +303,9 @@ static int pciehp_probe(struct pcie_device *dev)
>
>
On Fri, Aug 17, 2018 at 11:51:10PM -0700, Sinan Kaya wrote:
> +static int pciehp_control_surprise_error(struct controller *ctrl, bool
> enable)
The return value isn't checked, so this could return void.
> @@ -280,6 +303,9 @@ static int pciehp_probe(struct pcie_device *dev)
>
>
Hi Sinan,
I love your patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on next-20180817]
[cannot apply to v4.18]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
Hi Sinan,
I love your patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on next-20180817]
[cannot apply to v4.18]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On 8/18/2018 2:51 AM, Sinan Kaya wrote:
cleanup_slot(ctrl);
+ pciehp_control_surprise_error(ctrl, true);
I think I need to move this one line up but I'd like to see some input
here and also ask for some testing.
I don't have any hardware to test.
On 8/18/2018 2:51 AM, Sinan Kaya wrote:
cleanup_slot(ctrl);
+ pciehp_control_surprise_error(ctrl, true);
I think I need to move this one line up but I'd like to see some input
here and also ask for some testing.
I don't have any hardware to test.
PCIe Spec 3.0. 7.10.2. Uncorrectable Error Status Register (Offset 04h)
defines link down errors as an AER error as bit 5 Surprise Down Error
Status.
If hotplug is supported by a particular port, we want hotplug driver
to handle the link down/up conditions via Data Link Layer Active
interrupt
PCIe Spec 3.0. 7.10.2. Uncorrectable Error Status Register (Offset 04h)
defines link down errors as an AER error as bit 5 Surprise Down Error
Status.
If hotplug is supported by a particular port, we want hotplug driver
to handle the link down/up conditions via Data Link Layer Active
interrupt
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