On 07/20/2013 10:45 PM, Linus Walleij wrote:
> On Wed, Jul 17, 2013 at 10:04 AM, Jonas Jensen wrote:
>
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>
> #include
>
>> +#define TIMEREG_CR_1_ENABLE
On Wed, Jul 17, 2013 at 10:04 AM, Jonas Jensen wrote:
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
#include
> +#define TIMEREG_CR_1_ENABLEBIT(0)
Because BIT() comes from there. And we shall not rely on
On Wed, Jul 17, 2013 at 10:04 AM, Jonas Jensen jonas.jen...@gmail.com wrote:
+#include linux/clk.h
+#include linux/clockchips.h
+#include linux/interrupt.h
+#include linux/irq.h
+#include linux/irqreturn.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_irq.h
On 07/20/2013 10:45 PM, Linus Walleij wrote:
On Wed, Jul 17, 2013 at 10:04 AM, Jonas Jensen jonas.jen...@gmail.com wrote:
+#include linux/clk.h
+#include linux/clockchips.h
+#include linux/interrupt.h
+#include linux/irq.h
+#include linux/irqreturn.h
+#include linux/of.h
+#include
This patch adds an clocksource driver for the main timer(s)
found on MOXA ART SoCs.
The MOXA ART SoC provides three separate timers with individual
count/load/match registers, two are used here:
TIMER1: clockevents, used to support oneshot and periodic events
TIMER2: set up as a free running
This patch adds an clocksource driver for the main timer(s)
found on MOXA ART SoCs.
The MOXA ART SoC provides three separate timers with individual
count/load/match registers, two are used here:
TIMER1: clockevents, used to support oneshot and periodic events
TIMER2: set up as a free running
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