From: Govind Singh <govi...@codeaurora.org>
Add a new modem compatible string for Qualcomm QCS404 SoCs
Signed-off-by: Govind Singh <govi...@codeaurora.org>
Signed-off-by: Gokul Sriram Palanisamy <gokul...@codeaurora.org>
Acked-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 7ccd553..69c49c7 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -9,6 +9,7 @@ on the Qualcomm Hexagon core.
Definition: must be one of:
"qcom,q6v5-pil",
"qcom,ipq8074-wcss-pil"
+ "qcom,qcs404-wcss-pil"
"qcom,msm8916-mss-pil",
"qcom,msm8974-mss-pil"
"qcom,msm8996-mss-pil"
@@ -39,6 +40,7 @@ on the Qualcomm Hexagon core.
string:
qcom,q6v5-pil:
qcom,ipq8074-wcss-pil:
+ qcom,qcs404-wcss-pil:
qcom,msm8916-mss-pil:
qcom,msm8974-mss-pil:
must be "wdog", "fatal", "ready", "handover", "stop-ack"
@@ -67,6 +69,11 @@ on the Qualcomm Hexagon core.
Definition: The clocks needed depend on the compatible string:
qcom,ipq8074-wcss-pil:
no clock names required
+ qcom,qcs404-wcss-pil:
+ must be "xo", "gcc_abhs_cbcr", "gcc_abhs_cbcr",
+ "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc",
+ "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc",
+ "lcc_axim_cbc", "lcc_bcr_sleep"
qcom,q6v5-pil:
qcom,msm8916-mss-pil:
qcom,msm8974-mss-pil:
@@ -133,6 +140,14 @@ For the compatible string below the following supplies are
required:
booting of the Hexagon core
For the compatible string below the following supplies are required:
+ "qcom,qcs404-wcss-pil"
+- cx-supply:
+ Usage: required
+ Value type: <phandle>
+ Definition: reference to the regulators to be held on behalf of the
+ booting of the Hexagon core
+
+For the compatible string below the following supplies are required:
"qcom,msm8996-mss-pil"
- pll-supply:
Usage: required
--
2.7.4
